Eric Christopher 04bcc11905 Move DataLayout back to the TargetMachine from TargetSubtargetInfo ... derived classes. Since global data alignment, layout, and mangling is often based on the DataLayout, move it to the TargetMachine. This ensures that global data is going to be layed out and mangled consistently if the subtarget changes on a per function basis. Prior to this all targets(*) have had subtarget dependent code moved out and onto the TargetMachine. *One target hasn't been migrated as part of this change: R600. The R600 port has, as a subtarget feature, the size of pointers and this affects global data layout. I've currently hacked in a FIXME to enable progress, but the port needs to be updated to either pass the 64-bitness to the TargetMachine, or fix the DataLayout to avoid subtarget dependent features. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227113 91177308-0d34-0410-b5e6-96231b3b80d8		2015-01-26 19:03:15 +00:00
..
Disassembler	[cleanup] Re-sort all the #include lines in LLVM using	2015-01-14 11:23:27 +00:00
MCTargetDesc	[cleanup] Re-sort all the #include lines in LLVM using	2015-01-14 11:23:27 +00:00
TargetInfo
CMakeLists.txt
Hexagon.h
Hexagon.td	[Hexagon] Adding dealloc_return encoding and absolute address stores.	2015-01-06 16:15:15 +00:00
HexagonAsmPrinter.cpp	std::unique_ptrify the MCStreamer argument to createAsmPrinter	2015-01-18 20:29:04 +00:00
HexagonAsmPrinter.h	std::unique_ptrify the MCStreamer argument to createAsmPrinter	2015-01-18 20:29:04 +00:00
HexagonCallingConv.td
HexagonCallingConvLower.cpp
HexagonCallingConvLower.h
HexagonCFGOptimizer.cpp	[Hexagon] Adding encodings for JR class instructions. Updating complier usages.	2014-12-10 21:24:10 +00:00
HexagonCopyToCombine.cpp	[Hexagon] Dropping old combine instructions without encodings.	2014-12-30 17:53:54 +00:00
HexagonExpandPredSpillCode.cpp	[Hexagon] Adding post-increment register form stores and register-immediate form stores with tests.	2014-12-29 20:44:51 +00:00
HexagonFixupHwLoops.cpp	[Hexagon] Removing old variants of instructions and updating references.	2014-12-19 20:29:29 +00:00
HexagonFrameLowering.cpp	[Hexagon] Adding dealloc_return encoding and absolute address stores.	2015-01-06 16:15:15 +00:00
HexagonFrameLowering.h
HexagonHardwareLoops.cpp	[Hexagon] Removing old versions of cmph and updating references.	2015-01-14 18:26:14 +00:00
HexagonInstrFormats.td	[Hexagon] Reapplying 224775 load words.	2014-12-23 20:02:16 +00:00
HexagonInstrFormatsV4.td	[Hexagon] Adding compound jump encodings.	2015-01-06 20:03:31 +00:00
HexagonInstrInfo.cpp	[Hexagon] Replacing old versions of stores and loads.	2015-01-15 00:15:30 +00:00
HexagonInstrInfo.h
HexagonInstrInfo.td	[Hexagon] Converting remaining ALU32/ALU intrinsics.	2015-01-19 18:33:58 +00:00
HexagonInstrInfoV3.td	[Hexagon] Updating call/jump instruction patterns.	2015-01-16 17:05:27 +00:00
HexagonInstrInfoV4.td	[Hexagon] Fix 226206 by uncommenting required pattern and changing patterns for simple load-extends.	2015-01-15 21:35:49 +00:00
HexagonInstrInfoV5.td	[Hexagon] Converting old patterns to new versions using classes.	2015-01-16 19:29:59 +00:00
HexagonIntrinsics.td	[Hexagon] Converting multiply and accumulate with immediate intrinsics to patterns.	2015-01-21 18:13:15 +00:00
HexagonIntrinsicsDerived.td	[Hexagon] Removing old multiply defs and updating references to new versions.	2014-12-16 16:10:01 +00:00
HexagonIntrinsicsV3.td
HexagonIntrinsicsV4.td
HexagonIntrinsicsV5.td
HexagonISelDAGToDAG.cpp	[Hexagon] Updating muxir/ri/ii intrinsics. Setting predicate registers as compatible with i32 rather than doing custom type conversion.	2015-01-19 20:31:18 +00:00
HexagonISelLowering.cpp	[Hexagon] Updating call/jump instruction patterns.	2015-01-16 17:05:27 +00:00
HexagonISelLowering.h	[Hexagon] Updating call/jump instruction patterns.	2015-01-16 17:05:27 +00:00
HexagonMachineFunctionInfo.cpp
HexagonMachineFunctionInfo.h
HexagonMachineScheduler.cpp
HexagonMachineScheduler.h
HexagonMCInstLower.cpp
HexagonNewValueJump.cpp	[Hexagon] Adding J class call instructions.	2014-12-12 21:12:27 +00:00
HexagonOperands.td	[Hexagon] Converting remaining ALU32/ALU intrinsics.	2015-01-19 18:33:58 +00:00
HexagonPeephole.cpp	[Hexagon] Dropping old combine instructions without encodings.	2014-12-30 17:53:54 +00:00
HexagonRegisterInfo.cpp	[Hexagon] Replacing old versions of stores and loads.	2015-01-15 00:15:30 +00:00
HexagonRegisterInfo.h
HexagonRegisterInfo.td	[Hexagon] Updating muxir/ri/ii intrinsics. Setting predicate registers as compatible with i32 rather than doing custom type conversion.	2015-01-19 20:31:18 +00:00
HexagonRemoveSZExtArgs.cpp
HexagonSchedule.td
HexagonScheduleV4.td
HexagonSelectCCInfo.td
HexagonSelectionDAGInfo.cpp
HexagonSelectionDAGInfo.h
HexagonSplitConst32AndConst64.cpp
HexagonSplitTFRCondSets.cpp	[Hexagon] Adding vmux instruction. Removing old transfer instructions and updating references.	2015-01-15 18:16:00 +00:00
HexagonSubtarget.cpp	Move DataLayout back to the TargetMachine from TargetSubtargetInfo	2015-01-26 19:03:15 +00:00
HexagonSubtarget.h	Move DataLayout back to the TargetMachine from TargetSubtargetInfo	2015-01-26 19:03:15 +00:00
HexagonTargetMachine.cpp	Move DataLayout back to the TargetMachine from TargetSubtargetInfo	2015-01-26 19:03:15 +00:00
HexagonTargetMachine.h	Move DataLayout back to the TargetMachine from TargetSubtargetInfo	2015-01-26 19:03:15 +00:00
HexagonTargetObjectFile.cpp	Move DataLayout back to the TargetMachine from TargetSubtargetInfo	2015-01-26 19:03:15 +00:00
HexagonTargetObjectFile.h
HexagonVarargsCallingConvention.h
HexagonVLIWPacketizer.cpp	[Hexagon] Updating call/jump instruction patterns.	2015-01-16 17:05:27 +00:00
LLVMBuild.txt
Makefile