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llvm-6502/test/CodeGen/X86
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Evan Cheng 0802851816 Add -march=x86. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67783 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-26 23:03:32 +00:00
..
2002-12-23-LocalRAProblem.ll
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2002-12-23-SubProblem.ll
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2003-08-03-CallArgLiveRanges.ll
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2003-08-23-DeadBlockTest.ll
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2003-11-03-GlobalBool.ll
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2004-02-12-Memcpy.ll
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2004-02-13-FrameReturnAddress.ll
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2004-02-14-InefficientStackPointer.ll
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2004-02-22-Casts.ll
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2004-03-30-Select-Max.ll
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2004-04-09-SameValueCoalescing.ll
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2004-04-13-FPCMOV-Crash.ll
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2004-06-10-StackifierCrash.ll
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2004-10-08-SelectSetCCFold.ll
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2005-01-17-CycleInDAG.ll
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2005-02-14-IllegalAssembler.ll
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2005-05-08-FPStackifierPHI.ll
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2006-01-19-ISelFoldingBug.ll
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2006-03-01-InstrSchedBug.ll
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2006-03-02-InstrSchedBug.ll
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2006-04-04-CrossBlockCrash.ll
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2006-04-27-ISelFoldingBug.ll
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2006-05-01-SchedCausingSpills.ll
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2006-05-02-InstrSched1.ll
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2006-05-02-InstrSched2.ll
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2006-05-08-CoalesceSubRegClass.ll
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2006-05-08-InstrSched.ll
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2006-05-11-InstrSched.ll
Change these tests to use regular loads instead of llvm.x86.sse2.loadu.dq.
2009-02-16 00:44:23 +00:00
2006-05-17-VectorArg.ll
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2006-05-22-FPSetEQ.ll
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2006-05-25-CycleInDAG.ll
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2006-07-10-InlineAsmAConstraint.ll
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2006-07-12-InlineAsmQConstraint.ll
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2006-07-19-ATTAsm.ll
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2006-07-20-InlineAsm.ll
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2006-07-28-AsmPrint-Long-As-Pointer.ll
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2006-07-31-SingleRegClass.ll
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2006-08-07-CycleInDAG.ll
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2006-08-16-CycleInDAG.ll
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2006-08-21-ExtraMovInst.ll
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2006-09-01-CycleInDAG.ll
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2006-10-02-BoolRetCrash.ll
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2006-10-07-ScalarSSEMiscompile.ll
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2006-10-09-CycleInDAG.ll
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2006-10-10-FindModifiedNodeSlotBug.ll
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2006-10-12-CycleInDAG.ll
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2006-10-13-CycleInDAG.ll
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2006-10-19-SwitchUnnecessaryBranching.ll
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2006-11-12-CSRetCC.ll
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2006-11-17-IllegalMove.ll
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2006-11-27-SelectLegalize.ll
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2006-11-28-Memcpy.ll
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2006-12-19-IntelSyntax.ll
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2007-01-08-InstrSched.ll
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2007-01-13-StackPtrIndex.ll
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2007-01-29-InlineAsm-ir.ll
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2007-02-04-OrAddrMode.ll
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2007-02-19-LiveIntervalAssert.ll
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2007-02-25-FastCCStack.ll
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2007-03-01-SpillerCrash.ll
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2007-03-15-GEP-Idx-Sink.ll
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2007-03-16-InlineAsm.ll
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2007-03-18-LiveIntervalAssert.ll
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2007-03-24-InlineAsmMultiRegConstraint.ll
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2007-03-24-InlineAsmPModifier.ll
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2007-03-24-InlineAsmVectorOp.ll
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2007-03-24-InlineAsmXConstraint.ll
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2007-03-26-CoalescerBug.ll
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2007-04-08-InlineAsmCrash.ll
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2007-04-11-InlineAsmVectorResult.ll
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2007-04-17-LiveIntervalAssert.ll
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2007-04-24-Huge-Stack.ll
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2007-04-24-VectorCrash.ll
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2007-04-25-MMX-PADDQ.ll
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2007-04-27-InlineAsm-IntMemInput.ll
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2007-05-05-VecCastExpand.ll
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2007-05-07-InvokeSRet.ll
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2007-05-14-LiveIntervalAssert.ll
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2007-05-15-maskmovq.ll
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2007-05-17-ShuffleISelBug.ll
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2007-06-04-tailmerge4.ll
CodeGen still defaults to non-verbose asm, but llc now overrides it and default to verbose.
2009-03-25 01:47:28 +00:00
2007-06-04-X86-64-CtorAsmBugs.ll
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2007-06-05-LSR-Dominator.ll
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2007-06-14-branchfold.ll
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2007-06-15-IntToMMX.ll
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2007-06-28-X86-64-isel.ll
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2007-06-29-DAGCombinerBug.ll
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2007-06-29-VecFPConstantCSEBug.ll
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2007-07-03-GR64ToVR64.ll
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2007-07-10-StackerAssert.ll
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2007-07-18-Vector-Extract.ll
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2007-08-01-LiveVariablesBug.ll
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2007-08-09-IllegalX86-64Asm.ll
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2007-08-10-SignExtSubreg.ll
Revert 67132. This is breaking some objective-c apps.
2009-03-25 20:20:11 +00:00
2007-08-13-AppendingLinkage.ll
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2007-08-13-SpillerReuse.ll
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2007-09-03-X86-64-EhSelector.ll
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2007-09-05-InvalidAsm.ll
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2007-09-06-ExtWeakAliasee.ll
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2007-09-17-ObjcFrameEH.ll
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2007-09-18-ShuffleXformBug.ll
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2007-09-27-LDIntrinsics.ll
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2007-10-04-AvoidEFLAGSCopy.ll
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2007-10-05-3AddrConvert.ll
Teach LSR sink to sink the immediate portion of the common expression back into uses if they fit in address modes of all the uses.
2009-02-21 02:06:47 +00:00
2007-10-12-CoalesceExtSubReg.ll
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2007-10-12-SpillerUnfold1.ll
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2007-10-12-SpillerUnfold2.ll
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2007-10-14-CoalescerCrash.ll
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2007-10-15-CoalescerCrash.ll
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2007-10-16-CoalescerCrash.ll
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2007-10-16-fp80_select.ll
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2007-10-16-IllegalAsm.ll
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2007-10-17-IllegalAsm.ll
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2007-10-19-SpillerUnfold.ll
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2007-10-28-inlineasm-q-modifier.ll
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2007-10-29-ExtendSetCC.ll
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2007-10-30-LSRCrash.ll
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2007-10-31-extractelement-i64.ll
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2007-11-01-ISelCrash.ll
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2007-11-02-BadAsm.ll
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2007-11-03-x86-64-q-constraint.ll
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2007-11-04-LiveIntervalCrash.ll
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2007-11-04-LiveVariablesBug.ll
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2007-11-04-rip-immediate-constant.ll
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2007-11-06-InstrSched.ll
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2007-11-07-MulBy4.ll
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2007-11-14-Coalescer-Bug.ll
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2007-11-30-LoadFolding-Bug.ll
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2007-11-30-TestLoadFolding.ll
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2007-12-11-FoldImpDefSpill.ll
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2007-12-16-BURRSchedCrash.ll
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2007-12-18-LoadCSEBug.ll
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2008-01-08-IllegalCMP.ll
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2008-01-08-SchedulerCrash.ll
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2008-01-09-LongDoubleSin.ll
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2008-01-16-FPStackifierAssert.ll
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2008-01-16-InvalidDAGCombineXform.ll
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2008-01-16-Trampoline.ll
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2008-01-25-EmptyFunction.ll
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2008-02-05-ISelCrash.ll
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2008-02-06-LoadFoldingBug.ll
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2008-02-08-LoadFoldingBug.ll
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2008-02-14-BitMiscompile.ll
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2008-02-18-TailMergingBug.ll
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2008-02-20-InlineAsmClobber.ll
Model inline asm constraint which ties an input to an output register as machine operand TIED_TO constraint. This eliminated the need to pre-allocate registers for these. This also allows register allocator can eliminate the unneeded copies.
2009-03-23 08:01:15 +00:00
2008-02-22-LocalRegAllocBug.ll
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2008-02-22-ReMatBug.ll
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2008-02-25-InlineAsmBug.ll
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2008-02-25-X86-64-CoalescerBug.ll
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2008-02-26-AsmDirectMemOp.ll
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2008-02-27-DeadSlotElimBug.ll
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2008-02-27-PEICrash.ll
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2008-03-06-frem-fpstack.ll
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2008-03-07-APIntBug.ll
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2008-03-10-RegAllocInfLoop.ll
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2008-03-12-ThreadLocalAlias.ll
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2008-03-13-TwoAddrPassCrash.ll
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2008-03-14-SpillerCrash.ll
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2008-03-18-CoalescerBug.ll
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2008-03-19-DAGCombinerBug.ll
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2008-03-23-DarwinAsmComments.ll
CodeGen still defaults to non-verbose asm, but llc now overrides it and default to verbose.
2009-03-25 01:47:28 +00:00
2008-03-25-TwoAddrPassBug.ll
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2008-03-31-SpillerFoldingBug.ll
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2008-04-02-unnamedEH.ll
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2008-04-08-CoalescerCrash.ll
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2008-04-09-BranchFolding.ll
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2008-04-15-LiveVariableBug.ll
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2008-04-16-CoalescerBug.ll
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2008-04-16-ReMatBug.ll
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2008-04-17-CoalescerBug.ll
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2008-04-24-MemCpyBug.ll
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2008-04-24-pblendw-fold-crash.ll
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2008-04-26-Asm-Optimize-Imm.ll
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2008-04-28-CoalescerBug.ll
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2008-04-28-CyclicSchedUnit.ll
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2008-05-01-InvalidOrdCompare.ll
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2008-05-06-SpillerBug.ll
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2008-05-09-PHIElimBug.ll
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2008-05-09-ShuffleLoweringBug.ll
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2008-05-12-tailmerge-5.ll
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2008-05-21-CoalescerBug.ll
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2008-05-22-FoldUnalignedLoad.ll
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2008-05-28-CoalescerBug.ll
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2008-05-28-LocalRegAllocBug.ll
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2008-06-04-MemCpyLoweringBug.ll
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2008-06-13-NotVolatileLoadStore.ll
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2008-06-13-VolatileLoadStore.ll
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2008-06-16-SubregsBug.ll
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2008-06-18-BadShuffle.ll
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2008-06-25-VecISelBug.ll
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2008-07-07-DanglingDeadInsts.ll
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2008-07-09-ELFSectionAttributes.ll
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2008-07-11-SHLBy1.ll
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2008-07-11-SpillerBug.ll
Fix test after Chris' select changes.
2009-03-12 16:10:08 +00:00
2008-07-16-CoalescerCrash.ll
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2008-07-19-movups-spills.ll
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2008-07-22-CombinerCrash.ll
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2008-07-23-VSetCC.ll
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2008-08-05-SpillerBug.ll
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2008-08-06-RewriterBug.ll
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2008-08-17-UComiCodeGenBug.ll
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2008-08-19-SubAndFetch.ll
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2008-08-23-64Bit-maskmovq.ll
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2008-08-23-X86-64AsmBug.ll
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2008-08-25-AsmRegTypeMismatch.ll
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2008-08-31-EH_RETURN32.ll
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2008-08-31-EH_RETURN64.ll
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2008-09-05-sinttofp-2xi32.ll
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2008-09-09-LinearScanBug.ll
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2008-09-10-SpillerBug2.ll
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2008-09-11-CoalescerBug2.ll
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2008-09-11-CoalescerBug.ll
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2008-09-17-inline-asm-1.ll
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2008-09-18-inline-asm-2.ll
Model inline asm constraint which ties an input to an output register as machine operand TIED_TO constraint. This eliminated the need to pre-allocate registers for these. This also allows register allocator can eliminate the unneeded copies.
2009-03-23 08:01:15 +00:00
2008-09-19-RegAllocBug.ll
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2008-09-25-sseregparm-1.ll
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2008-09-26-FrameAddrBug.ll
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2008-09-29-ReMatBug.ll
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2008-09-29-VolatileBug.ll
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2008-10-02-Atomics32-2.ll
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2008-10-06-MMXISelBug.ll
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2008-10-06-x87ld-nan-1.ll
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2008-10-06-x87ld-nan-2.ll
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2008-10-07-SSEISelBug.ll
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2008-10-11-CallCrash.ll
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2008-10-13-CoalescerBug.ll
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2008-10-16-SpillerBug.ll
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2008-10-16-VecUnaryOp.ll
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2008-10-17-Asm64bitRConstraint.ll
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2008-10-20-AsmDoubleInI32.ll
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2008-10-24-FlippedCompare.ll
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2008-10-27-CoalescerBug.ll
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2008-10-27-StackRealignment.ll
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2008-10-29-ExpandVAARG.ll
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2008-11-03-F80VAARG.ll
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2008-11-06-testb.ll
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2008-11-13-inlineasm-3.ll
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2008-11-29-DivideConstant16bit.ll
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2008-11-29-DivideConstant16bitSigned.ll
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2008-11-29-ULT-Sign.ll
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2008-12-01-loop-iv-used-outside-loop.ll
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2008-12-01-SpillerAssert.ll
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2008-12-02-dagcombine-1.ll
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2008-12-02-dagcombine-2.ll
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2008-12-02-dagcombine-3.ll
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2008-12-02-IllegalResultType.ll
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2008-12-05-SpillerCrash.ll
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2008-12-16-BadShift.ll
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2008-12-16-dagcombine-4.ll
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2008-12-19-EarlyClobberBug.ll
Model inline asm constraint which ties an input to an output register as machine operand TIED_TO constraint. This eliminated the need to pre-allocate registers for these. This also allows register allocator can eliminate the unneeded copies.
2009-03-23 08:01:15 +00:00
2008-12-22-dagcombine-5.ll
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2008-12-23-crazy-address.ll
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2008-12-23-dagcombine-6.ll
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2009-01-12-CoalescerBug.ll
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2009-01-13-DoubleUpdate.ll
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2009-01-16-SchedulerBug.ll
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2009-01-16-UIntToFP.ll
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2009-01-18-ConstantExprCrash.ll
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2009-01-25-NoSSE.ll
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2009-01-26-WrongCheck.ll
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2009-01-27-NullStrings.ll
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2009-01-29-LocalRegAllocBug.ll
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2009-01-31-BigShift2.ll
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2009-01-31-BigShift3.ll
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2009-01-31-BigShift.ll
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2009-02-01-LargeMask.ll
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2009-02-03-AnalyzedTwice.ll
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2009-02-04-sext-i64-gep.ll
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2009-02-05-CoalescerBug.ll
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2009-02-07-CoalescerBug.ll
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2009-02-08-CoalescerBug.ll
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2009-02-11-codegenprepare-reuse.ll
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2009-02-12-DebugInfoVLA.ll
fix the X86 backend to just drop llvm.declare nodes for VLAs instead of
2009-02-12 17:33:11 +00:00
2009-02-12-InlineAsm-nieZ-constraints.ll
Arrange to print constants that match "n" and "i" constraints
2009-02-12 20:58:09 +00:00
2009-02-12-SpillerBug.ll
add PR
2009-02-12 17:04:57 +00:00
2009-02-20-PreAllocSplit-Crash.ll
Fix a crash in the pre-alloc splitter exposed by recent codegen changes.
2009-02-20 10:02:23 +00:00
2009-02-21-ExtWeakInitializer.ll
Drop bunch of half-working stuff in the ext_weak linkage support.
2009-02-21 11:53:32 +00:00
2009-02-25-CommuteBug.ll
ADDS{D|S}rr_Int and MULS{D|S}rr_Int are not commutable. The users of these intrinsics expect the high bits will not be modified.
2009-02-26 03:12:02 +00:00
2009-02-26-MachineLICMBug.ll
MachineLICM CSE should match destination register classes; avoid hoisting implicit_def's.
2009-02-27 00:02:22 +00:00
2009-03-03-BitcastLongDouble.ll
Add radar number.
2009-03-10 06:53:54 +00:00
2009-03-03-BTHang.ll
The DAG combiner was performing a BT combine. The BT combine had a value of -1,
2009-03-04 00:18:06 +00:00
2009-03-05-burr-list-crash.ll
Fix ScheduleDAGRRList::CopyAndMoveSuccessors' handling of nodes
2009-03-06 02:23:01 +00:00
2009-03-07-FPConstSelect.ll
reapply my previous patch (r66358) with a tweak to set the
2009-03-11 05:08:08 +00:00
2009-03-09-APIntCrash.ll
Fix PR3763 by using proper APInt methods instead of uint64_t's.
2009-03-09 20:22:18 +00:00
2009-03-09-SpillerBug.ll
Yet another case where the spiller marked two uses of the same register on the same instruction as kill. This fixes PR3706.
2009-03-09 19:00:05 +00:00
2009-03-10-CoalescerBug.ll
Two coalescer fixes in one.
2009-03-11 00:03:21 +00:00
2009-03-11-CoalescerBug.ll
My last coalescer fix introduced a subtler one. It's aborting a commuting optimization too late and left the live intervals to be out of sync with instructions. This fixes 8b10b.
2009-03-11 22:18:44 +00:00
2009-03-12-CPAlignBug.ll
Fix some significant problems with constant pools that resulted in unnecessary paddings between constant pool entries, larger than necessary alignments (e.g. 8 byte alignment for .literal4 sections), and potentially other issues.
2009-03-13 07:51:59 +00:00
2009-03-13-PHIElimBug.ll
Reapply r67049, with the test adjusted for darwin
2009-03-17 09:46:22 +00:00
2009-03-16-PHIElimInLPad.ll
CodeGen still defaults to non-verbose asm, but llc now overrides it and default to verbose.
2009-03-25 01:47:28 +00:00
2009-03-16-SpillerBug.ll
Spiller may unfold load / mod / store instructions as an optimization when the would be loaded value is available in a register. It needs to check if it's legal to clobber the register. Also, the register can contain values of multiple spill slots, make sure to check all instead of just the one being unfolded.
2009-03-17 01:23:09 +00:00
2009-03-23-i80-fp80.ll
Fix internal representation of fp80 to be the
2009-03-23 21:16:53 +00:00
2009-03-23-LinearScanBug.ll
Fix a bug in spill weight computation. If the alias is a super-register, and the super-register is in the register class we are trying to allocate. Then add the weight to all sub-registers of the super-register even if they are not aliases.
2009-03-23 22:57:19 +00:00
2009-03-23-MultiUseSched.ll
Add a testcase for the scheduling heuristic introduced in r67586.
2009-03-24 16:38:27 +00:00
2009-03-25-TestBug.ll
Add -march=x86.
2009-03-26 23:03:32 +00:00
20081212.ll
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20090313-signext.ll
Revert 67132. This is breaking some objective-c apps.
2009-03-25 20:20:11 +00:00
abi-isel.ll
Add a testcase that covers a wide variety of ABI isel cases.
2009-03-14 02:35:10 +00:00
add-trick32.ll
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add-trick64.ll
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add-with-overflow.ll
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aliases.ll
CodeGen still defaults to non-verbose asm, but llc now overrides it and default to verbose.
2009-03-25 01:47:28 +00:00
aligned-comm.ll
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all-ones-vector.ll
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alloca-align-rounding.ll
this is apparently passing now. Evan/Dan, please check
2009-03-17 20:23:43 +00:00
and-or-fold.ll
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arg-cast.ll
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asm-block-labels.ll
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asm-global-imm.ll
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asm-indirect-mem.ll
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atomic_op.ll
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Atomics-32.ll
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Atomics-64.ll
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avoid-loop-align.ll
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bitcast2.ll
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bitcast-int-to-vector.ll
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bitcast.ll
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break-anti-dependencies.ll
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bswap-inline-asm.ll
Recognize bswapl as bswap too.
2009-03-17 02:45:40 +00:00
bswap.ll
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bt.ll
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byval2.ll
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byval3.ll
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byval4.ll
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byval5.ll
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byval6.ll
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byval7.ll
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byval.ll
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call-imm.ll
Disable the "call to immediate" optimization on x86-64. It is
2009-03-18 00:43:52 +00:00
call-push.ll
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clz.ll
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cmp0.ll
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cmp1.ll
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cmp2.ll
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cmp-test.ll
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coalescer-commute1.ll
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coalescer-commute2.ll
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coalescer-commute3.ll
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coalescer-commute4.ll
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coalescer-commute5.ll
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coalescer-remat.ll
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combine-lds.ll
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commute-cmov.ll
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commute-intrinsic.ll
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commute-two-addr.ll
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compare_folding.ll
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compare-add.ll
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complex-fca.ll
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const-select.ll
Revert 67132. This is breaking some objective-c apps.
2009-03-25 20:20:11 +00:00
constant-pool-remat-0.ll
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convert-2-addr-3-addr-inc64.ll
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copysign-zero.ll
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critical-edge-split.ll
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cstring.ll
GV with null value initializer shouldn't go to BSS if it's meant for a mergeable strings section. Currently it only checks for Darwin. Someone else please check if it should apply to other targets as well.
2009-02-18 02:19:52 +00:00
dag-rauw-cse.ll
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dagcombine-buildvector.ll
Add newline at end of file.
2009-03-17 17:08:25 +00:00
dagcombine-cse.ll
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darwin-bzero.ll
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darwin-no-dead-strip.ll
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darwin-stub.ll
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dg.exp
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div_const.ll
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divrem.ll
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dollar-name.ll
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dyn-stackalloc.ll
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epilogue.ll
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extend.ll
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extern_weak.ll
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extmul64.ll
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extmul128.ll
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extract-combine.ll
Fix a problem with DAGCombine on 64b targets where folding
2009-03-01 23:44:07 +00:00
extractelement-from-arg.ll
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extractelement-load.ll
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extractelement-shuffle.ll
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extractps.ll
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fabs.ll
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fast-cc-callee-pops.ll
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fast-cc-merge-stack-adj.ll
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fast-cc-pass-in-regs.ll
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fast-isel-call.ll
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fast-isel-gep-sext.ll
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fast-isel-i1.ll
Fix FastISel's assumption that i1 values are always zero-extended
2009-03-13 20:42:20 +00:00
fast-isel-mem.ll
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fast-isel-phys.ll
Improve FastISel's handling of truncates to i1, and implement
2009-03-13 23:53:06 +00:00
fast-isel-shift-imm.ll
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fast-isel-tls.ll
Fast-isel can't do TLS yet, so it should fall back to SDISel
2009-02-23 22:03:08 +00:00
fast-isel-trunc.ll
Improve FastISel's handling of truncates to i1, and implement
2009-03-13 23:53:06 +00:00
fast-isel.ll
Add a few more ptrtoint/inttoptr cast tests.
2009-03-13 23:54:51 +00:00
fastcall-correct-mangling.ll
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fastcc-2.ll
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fastcc-byval.ll
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fastcc-sret.ll
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fastcc.ll
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field-extract-use-trunc.ll
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fildll.ll
…
fold-add.ll
Enhance address-mode folding of ISD::ADD to handle cases where the
2009-03-13 02:25:09 +00:00
fold-and-shift.ll
…
fold-call-2.ll
…
fold-call-3.ll
…
fold-call.ll
…
fold-imm.ll
…
fold-load.ll
…
fold-mul-lohi.ll
…
fold-pcmpeqd-0.ll
make these tests pass when run on a G5.
2009-02-20 07:10:11 +00:00
fold-pcmpeqd-1.ll
…
fold-pcmpeqd-2.ll
make these tests pass when run on a G5.
2009-02-20 07:10:11 +00:00
fp2sint.ll
…
fp_constant_op.ll
…
fp_load_cast_fold.ll
…
fp_load_fold.ll
…
fp-immediate-shorten.ll
…
fp-in-intregs.ll
…
fp-stack-2results.ll
…
fp-stack-compare.ll
…
fp-stack-direct-ret.ll
…
fp-stack-ret-conv.ll
…
fp-stack-ret-store.ll
…
fp-stack-ret.ll
…
fp-stack-retcopy.ll
…
fp-stack-set-st1.ll
…
fsxor-alignment.ll
…
full-lsr.ll
Implement "superhero" strength reduction, or full strength
2009-02-20 04:17:46 +00:00
ga-offset.ll
…
hidden-vis-2.ll
…
hidden-vis-3.ll
…
hidden-vis-4.ll
…
hidden-vis.ll
…
i2k.ll
…
i64-mem-copy.ll
Typo.
2009-03-12 17:07:39 +00:00
i128-and-beyond.ll
…
i128-immediate.ll
…
i128-mul.ll
…
i128-ret.ll
…
i256-add.ll
…
iabs.ll
…
illegal-asm.ll
Update test for pr3864.
2009-03-23 18:27:36 +00:00
illegal-insert.ll
…
illegal-vector-args-return.ll
…
imp-def-copies.ll
…
imul-lea.ll
…
inline-asm-2addr.ll
Model inline asm constraint which ties an input to an output register as machine operand TIED_TO constraint. This eliminated the need to pre-allocate registers for these. This also allows register allocator can eliminate the unneeded copies.
2009-03-23 08:01:15 +00:00
inline-asm-flag-clobber.ll
Rename test.
2009-03-04 02:47:25 +00:00
inline-asm-fpstack.ll
…
inline-asm-mrv.ll
…
inline-asm-out-regs.ll
Fix PR3391 and PR3864. Reg allocator infinite looping.
2009-03-23 18:24:37 +00:00
inline-asm-pic.ll
…
inline-asm-x-scalar.ll
…
inline-asm.ll
…
ins_subreg_coalesce-1.ll
…
ins_subreg_coalesce-2.ll
…
ins_subreg_coalesce-3.ll
…
insertelement-copytoregs.ll
…
insertelement-legalize.ll
…
invalid-shift-immediate.ll
…
isel-sink2.ll
Don't force promotion of return arguments on the callee.
2009-03-17 23:43:59 +00:00
isel-sink3.ll
…
isel-sink.ll
…
isint.ll
…
isnan2.ll
…
isnan.ll
…
ispositive.ll
…
iv-users-in-other-loops.ll
Implement "superhero" strength reduction, or full strength
2009-02-20 04:17:46 +00:00
jump_sign.ll
…
ldzero.ll
…
lea-2.ll
…
lea-3.ll
…
lea-4.ll
…
lea-recursion.ll
…
lea.ll
…
legalizedag_vec.ll
Revert BuildVectorSDNode related patches: 65426, 65427, and 65296.
2009-02-25 22:49:59 +00:00
lfence.ll
…
limited-prec.ll
…
local-liveness.ll
…
long-setcc.ll
…
longlong-deadload.ll
…
loop-hoist.ll
…
loop-strength-reduce2.ll
…
loop-strength-reduce3.ll
…
loop-strength-reduce4.ll
…
loop-strength-reduce5.ll
…
loop-strength-reduce6.ll
…
loop-strength-reduce7.ll
Fix strange logic in CollectIVUsers used to determine whether all uses are
2009-02-20 22:16:49 +00:00
loop-strength-reduce8.ll
Teach LSR sink to sink the immediate portion of the common expression back into uses if they fit in address modes of all the uses.
2009-02-21 02:06:47 +00:00
loop-strength-reduce-2.ll
Teach LSR sink to sink the immediate portion of the common expression back into uses if they fit in address modes of all the uses.
2009-02-21 02:06:47 +00:00
loop-strength-reduce-3.ll
…
loop-strength-reduce.ll
…
lsr-negative-stride.ll
Make this test more thorough. Not only should there be no %esi,
2009-03-05 19:31:32 +00:00
lsr-sort.ll
Fix LSR's IV sorting function to explicitly sort by bitwidth
2009-02-13 00:26:43 +00:00
maskmovdqu.ll
…
memcpy-2.ll
…
memcpy.ll
…
memmove-0.ll
…
memmove-1.ll
…
memmove-2.ll
…
memmove-3.ll
…
memmove-4.ll
…
memset64-on-x86-32.ll
…
memset-2.ll
…
memset.ll
…
mfence.ll
…
mingw-alloca.ll
…
mmx-arg-passing2.ll
…
mmx-arg-passing.ll
…
mmx-arith.ll
…
mmx-bitcast-to-i64.ll
…
mmx-copy-gprs.ll
On x86, if the only use of a i64 load is a i64 store, generate a pair of double load and store instead.
2009-03-12 05:59:15 +00:00
mmx-emms.ll
…
mmx-insert-element.ll
…
mmx-pinsrw.ll
…
mmx-punpckhdq.ll
…
mmx-s2v.ll
…
mmx-shift.ll
…
mmx-shuffle.ll
…
mmx-vzmovl-2.ll
…
mmx-vzmovl.ll
…
movgs.ll
…
mul64.ll
…
mul128.ll
…
mul-legalize.ll
Move 3 "(add (select cc, 0, c), x) -> (select cc, x, (add, x, c))"
2009-03-12 06:52:53 +00:00
mul-remat.ll
…
mul-shift-reassoc.ll
…
multiple-return-values-cross-block.ll
…
multiple-return-values.ll
…
nancvt.ll
…
neg_fp.ll
…
negate-add-zero.ll
…
negative_zero.ll
…
negative-sin.ll
…
negative-subscript.ll
…
nobt.ll
…
nofence.ll
…
nosse-error1.ll
…
nosse-error2.ll
…
nosse-varargs.ll
…
opt-ext-uses.ll
…
optimize-smax.ll
…
or-branch.ll
…
overlap-shift.ll
…
packed_struct.ll
…
peep-test-0.ll
Fix the "test" optimization to recognize "dec" as an add of
2009-03-05 19:32:48 +00:00
peep-test-1.ll
Fix the "test" optimization to recognize "dec" as an add of
2009-03-05 19:32:48 +00:00
peep-test-2.ll
Arithmetic instructions don't set EFLAGS bits OF and CF bits
2009-03-07 01:58:32 +00:00
peep-vector-extract-concat.ll
…
peep-vector-extract-insert.ll
…
phys_subreg_coalesce-2.ll
…
phys_subreg_coalesce.ll
…
pic_jumptable.ll
CodeGen still defaults to non-verbose asm, but llc now overrides it and default to verbose.
2009-03-25 01:47:28 +00:00
pic-1.ll
…
pic-2.ll
…
pic-3.ll
…
pic-4.ll
…
pic-5.ll
…
pic-6.ll
…
pic-cpool.ll
reapply my previous patch (r66358) with a tweak to set the
2009-03-11 05:08:08 +00:00
pic-jtbl.ll
…
pic-load-remat.ll
…
pmul.ll
…
postalloc-coalescing.ll
…
pr1462.ll
…
pr1489.ll
…
pr1505.ll
…
pr1505b.ll
…
pr2177.ll
…
pr2182.ll
…
pr2326.ll
…
pr2623.ll
…
pr2656.ll
…
pr2659.ll
…
pr2849.ll
…
pr2924.ll
…
pr2982.ll
…
pr3154.ll
…
pr3216.ll
…
pr3241.ll
…
pr3243.ll
…
pr3244.ll
…
pr3250.ll
…
pr3317.ll
…
pr3366.ll
…
pr3457.ll
…
pr3495-2.ll
…
pr3495.ll
…
pr3522.ll
Fix PR3522. It's not safe to sink into landing pad BB's.
2009-02-15 08:36:12 +00:00
pre-split1.ll
…
pre-split2.ll
…
pre-split3.ll
…
pre-split4.ll
…
pre-split5.ll
…
pre-split6.ll
Add a restore folder, which shaves a dozen or so machineinstrs off oggenc. Update a testcase to check this.
2009-03-04 08:52:31 +00:00
pre-split7.ll
…
pre-split8.ll
…
pre-split9.ll
…
pre-split10.ll
…
prefetch.ll
…
private.ll
…
rdtsc.ll
…
red-zone.ll
…
regpressure.ll
…
rem-2.ll
…
rem.ll
…
remat-constant.ll
…
remat-mov0.ll
…
ret-addr.ll
…
ret-i64-0.ll
…
ret-mmx.ll
Make sure this test passes on linux-ppc.
2009-02-27 00:51:50 +00:00
rip-rel-address.ll
Use %rip-relative addressing on x86-64 whenever practical, as
2009-03-14 02:33:41 +00:00
rot16.ll
…
rot32.ll
…
rot64.ll
…
rotate2.ll
…
rotate.ll
…
scalar_sse_minmax.ll
…
scalar-extract.ll
…
scalar-min-max-fill-operand.ll
…
select-no-cmov.ll
generalize the previous code to use the full generality of LEA
2009-03-13 05:53:31 +00:00
select-zero-one.ll
…
select.ll
…
setoeq.ll
…
setuge.ll
…
sext-load.ll
…
sext-ret-val.ll
Add a test case for PR3779: when to promote the function return value.
2009-03-25 20:30:19 +00:00
sext-select.ll
…
sext-trunc.ll
Revert 67132. This is breaking some objective-c apps.
2009-03-25 20:20:11 +00:00
sfence.ll
…
shift-and.ll
…
shift-coalesce.ll
…
shift-codegen.ll
…
shift-combine.ll
…
shift-double.ll
…
shift-folding.ll
…
shift-one.ll
…
shl_elim.ll
…
shrink-fp-const1.ll
…
shrink-fp-const2.ll
…
sincos.ll
…
small-byval-memcpy.ll
…
smul-with-overflow-2.ll
…
smul-with-overflow-3.ll
…
smul-with-overflow.ll
…
soft-fp.ll
Teach x86 target -soft-float.
2009-02-13 22:36:38 +00:00
split-eh-lpad-edges.ll
Revert 67132. This is breaking some objective-c apps.
2009-03-25 20:20:11 +00:00
split-select.ll
…
split-vector-rem.ll
…
sret.ll
…
sse41-extractps-bitcast-0.ll
…
sse41-extractps-bitcast-1.ll
…
sse41-pmovx.ll
…
sse_reload_fold.ll
…
sse-align-0.ll
…
sse-align-1.ll
…
sse-align-2.ll
…
sse-align-3.ll
…
sse-align-4.ll
…
sse-align-5.ll
…
sse-align-6.ll
…
sse-align-7.ll
…
sse-align-8.ll
…
sse-align-9.ll
…
sse-align-10.ll
…
sse-align-11.ll
…
sse-align-12.ll
…
sse-fcopysign.ll
…
sse-load-ret.ll
…
sse-varargs.ll
…
stack-align.ll
…
store_op_load_fold2.ll
…
store_op_load_fold.ll
…
store-fp-constant.ll
…
store-global-address.ll
…
storetrunc-fp.ll
…
stride-nine-with-base-reg.ll
Teach LSR sink to sink the immediate portion of the common expression back into uses if they fit in address modes of all the uses.
2009-02-21 02:06:47 +00:00
stride-reuse.ll
…
sub-with-overflow.ll
…
subclass-coalesce.ll
…
subreg-to-reg-0.ll
…
subreg-to-reg-1.ll
…
subreg-to-reg-2.ll
Do not fold away subreg_to_reg if the source register has a sub-register index. That means the source register is taking a sub-register of a larger register. e.g. On x86
2009-03-23 07:19:58 +00:00
swizzle.ll
…
tailcall1.ll
…
tailcall-stackalign.ll
…
tailcallbyval64.ll
…
tailcallbyval.ll
…
tailcallfp2.ll
…
tailcallfp.ll
…
tailcallpic1.ll
…
tailcallpic2.ll
…
tailcallstack64.ll
…
test-nofold.ll
…
testl-commute.ll
…
tls1-pic.ll
Refactor TLS code and add some tests. The tests and expected results are:
2009-02-27 13:37:18 +00:00
tls1.ll
Refactor TLS code and add some tests. The tests and expected results are:
2009-02-27 13:37:18 +00:00
tls2-pic.ll
Refactor TLS code and add some tests. The tests and expected results are:
2009-02-27 13:37:18 +00:00
tls2.ll
Refactor TLS code and add some tests. The tests and expected results are:
2009-02-27 13:37:18 +00:00
tls3-pic.ll
Refactor TLS code and add some tests. The tests and expected results are:
2009-02-27 13:37:18 +00:00
tls3.ll
Refactor TLS code and add some tests. The tests and expected results are:
2009-02-27 13:37:18 +00:00
tls4-pic.ll
Refactor TLS code and add some tests. The tests and expected results are:
2009-02-27 13:37:18 +00:00
tls4.ll
Refactor TLS code and add some tests. The tests and expected results are:
2009-02-27 13:37:18 +00:00
tls5.ll
Refactor TLS code and add some tests. The tests and expected results are:
2009-02-27 13:37:18 +00:00
tls6.ll
Refactor TLS code and add some tests. The tests and expected results are:
2009-02-27 13:37:18 +00:00
tls7.ll
Refactor TLS code and add some tests. The tests and expected results are:
2009-02-27 13:37:18 +00:00
tls8.ll
Refactor TLS code and add some tests. The tests and expected results are:
2009-02-27 13:37:18 +00:00
tls9.ll
Refactor TLS code and add some tests. The tests and expected results are:
2009-02-27 13:37:18 +00:00
tls10.ll
Refactor TLS code and add some tests. The tests and expected results are:
2009-02-27 13:37:18 +00:00
tls11.ll
Don't force promotion of return arguments on the callee.
2009-03-17 23:43:59 +00:00
tls12.ll
Don't force promotion of return arguments on the callee.
2009-03-17 23:43:59 +00:00
tls13.ll
Improve sext and zext of TLS variables.
2009-03-13 18:37:06 +00:00
tls14.ll
Improve sext and zext of TLS variables.
2009-03-13 18:37:06 +00:00
trap.ll
…
trunc-to-bool.ll
…
twoaddr-coalesce-2.ll
Minor optimization:
2009-03-01 02:03:43 +00:00
twoaddr-coalesce.ll
Minor optimization:
2009-03-01 02:03:43 +00:00
twoaddr-delete.ll
If two-address def is dead and the instruction does not define other registers, and it doesn't produce side effects, just delete the instruction.
2009-02-21 03:14:25 +00:00
twoaddr-pass-sink.ll
…
twoaddr-remat.ll
…
uint_to_fp-2.ll
…
uint_to_fp.ll
…
umul-with-carry.ll
…
urem-i8-constant.ll
…
v4f32-immediate.ll
…
variable-sized-darwin-bzero.ll
…
variadic-node-pic.ll
…
vec_add.ll
…
vec_align.ll
…
vec_call.ll
…
vec_clear.ll
…
vec_ctbits.ll
…
vec_extract-sse4.ll
…
vec_extract.ll
…
vec_fneg.ll
…
vec_ins_extract-1.ll
make these tests pass when run on a G5.
2009-02-20 07:10:11 +00:00
vec_ins_extract.ll
…
vec_insert_4.ll
…
vec_insert-2.ll
…
vec_insert-3.ll
…
vec_insert-5.ll
…
vec_insert-6.ll
…
vec_insert-7.ll
…
vec_insert-8.ll
…
vec_insert.ll
…
vec_loadhl.ll
…
vec_logical.ll
…
vec_return.ll
…
vec_select.ll
…
vec_set-2.ll
…
vec_set-3.ll
…
vec_set-4.ll
…
vec_set-5.ll
…
vec_set-6.ll
…
vec_set-7.ll
…
vec_set-8.ll
…
vec_set-9.ll
…
vec_set-A.ll
…
vec_set-B.ll
…
vec_set-C.ll
…
vec_set-D.ll
…
vec_set-E.ll
…
vec_set-F.ll
…
vec_set-G.ll
…
vec_set-H.ll
…
vec_set-I.ll
…
vec_set-J.ll
…
vec_set.ll
…
vec_shift2.ll
…
vec_shift3.ll
…
vec_shift.ll
…
vec_shuffle-2.ll
Generate better code for v8i16 shuffles on SSE2
2009-02-23 08:49:38 +00:00
vec_shuffle-3.ll
…
vec_shuffle-4.ll
…
vec_shuffle-5.ll
…
vec_shuffle-6.ll
…
vec_shuffle-7.ll
…
vec_shuffle-8.ll
…
vec_shuffle-9.ll
…
vec_shuffle-10.ll
…
vec_shuffle-11.ll
…
vec_shuffle-12.ll
Generate better code for v8i16 shuffles on SSE2
2009-02-23 08:49:38 +00:00
vec_shuffle-13.ll
Generate better code for v8i16 shuffles on SSE2
2009-02-23 08:49:38 +00:00
vec_shuffle-14.ll
…
vec_shuffle-15.ll
…
vec_shuffle-16.ll
…
vec_shuffle-17.ll
…
vec_shuffle-18.ll
…
vec_shuffle-19.ll
…
vec_shuffle-20.ll
…
vec_shuffle-21.ll
Generate better code for v8i16 shuffles on SSE2
2009-02-23 08:49:38 +00:00
vec_shuffle-22.ll
…
vec_shuffle-23.ll
…
vec_shuffle-24.ll
…
vec_shuffle-25.ll
…
vec_shuffle-26.ll
…
vec_shuffle-27.ll
…
vec_shuffle-28.ll
Generate better code for v8i16 shuffles on SSE2
2009-02-23 08:49:38 +00:00
vec_shuffle-29.ll
Generate better code for v8i16 shuffles on SSE2
2009-02-23 08:49:38 +00:00
vec_shuffle-30.ll
…
vec_shuffle-31.ll
Generate better code for v8i16 shuffles on SSE2
2009-02-23 08:49:38 +00:00
vec_shuffle-32.ll
Generate better code for v8i16 shuffles on SSE2
2009-02-23 08:49:38 +00:00
vec_shuffle-33.ll
Generate better code for v8i16 shuffles on SSE2
2009-02-23 08:49:38 +00:00
vec_shuffle-34.ll
Generate better code for v8i16 shuffles on SSE2
2009-02-23 08:49:38 +00:00
vec_shuffle-35.ll
Use the -stack-alignment option instead of using a target triple
2009-02-23 16:34:46 +00:00
vec_shuffle-36.ll
Fixed a v8i16 shuffle case that should generate a pshufb instead of a pshuflw/hw.
2009-03-11 06:35:11 +00:00
vec_shuffle-37.ll
For yonah, fix a vector shuffle case for v16i8 where we didn't properly clear some bits.
2009-03-11 18:47:57 +00:00
vec_shuffle.ll
…
vec_splat-2.ll
…
vec_splat-3.ll
…
vec_splat-4.ll
…
vec_splat.ll
…
vec_ss_load_fold.ll
…
vec_zero_cse.ll
…
vec_zero-2.ll
…
vec_zero.ll
…
vector-intrinsics.ll
…
vector-rem.ll
…
vector-variable-idx.ll
…
vector.ll
…
vfcmp.ll
…
volatile.ll
…
vortex-bug.ll
…
vshift_scalar.ll
…
vshift_split2.ll
make these tests pass when run on a G5.
2009-02-20 07:10:11 +00:00
vshift_split.ll
…
vshift-1.ll
…
vshift-2.ll
…
vshift-3.ll
…
vshift-4.ll
…
weak.ll
…
widen_arith-1.ll
…
widen_arith-2.ll
…
widen_arith-3.ll
…
widen_arith-4.ll
…
widen_arith-5.ll
…
widen_arith-6.ll
…
widen_cast-1.ll
…
widen_cast-2.ll
…
widen_cast-3.ll
…
widen_cast-4.ll
…
widen_cast-5.ll
…
widen_cast-6.ll
…
widen_conv-1.ll
…
widen_conv-2.ll
…
widen_conv-3.ll
…
widen_conv-4.ll
…
widen_select-1.ll
…
widen_shuffle-1.ll
…
widen_shuffle-2.ll
…
x86-64-and-mask.ll
…
x86-64-arg.ll
…
x86-64-asm.ll
…
x86-64-dead-stack-adjust.ll
…
x86-64-disp.ll
…
x86-64-frameaddr.ll
…
x86-64-gv-offset.ll
…
x86-64-malloc.ll
Fix codegen to compute the size of an allocation by multiplying the
2009-03-17 19:36:00 +00:00
x86-64-mem.ll
…
x86-64-pic-1.ll
…
x86-64-pic-2.ll
…
x86-64-pic-3.ll
…
x86-64-pic-4.ll
…
x86-64-pic-5.ll
…
x86-64-pic-6.ll
…
x86-64-pic-7.ll
…
x86-64-pic-8.ll
…
x86-64-pic-9.ll
…
x86-64-pic-10.ll
…
x86-64-pic-11.ll
…
x86-64-ret0.ll
…
x86-64-shortint.ll
…
x86-64-sret-return.ll
…
x86-64-varargs.ll
…
x86-frameaddr2.ll
…
x86-frameaddr.ll
…
xmm-r64.ll
…
xor_not.ll
…
xor-undef.ll
…
xorl.ll
…
zero-remat.ll
…
zext-inreg-0.ll
…
zext-inreg-1.ll
…