llvm-6502/lib/CodeGen/SelectionDAG
Evan Cheng 14a6db8bd9 Initial support for register pressure aware scheduling. The register reduction
scheduler can go into a "vertical mode" (i.e. traversing up the two-address
chain, etc.) when the register pressure is low.
This does seem to reduce the number of spills in the cases I've looked at. But
with x86, it's no guarantee the performance of the code improves.
It can be turned on with -sched-vertically option.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28108 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-04 19:16:39 +00:00
..
DAGCombiner.cpp Remove a bogus transformation. This fixes SingleSource/UnitTests/2006-01-23-InitializedBitField.c 2006-04-28 23:33:20 +00:00
LegalizeDAG.cpp Refactor TargetMachine, pushing handling of TargetData into the target-specific subclasses. This has one caller-visible change: getTargetData() now returns a pointer instead of a reference. 2006-05-03 01:29:57 +00:00
Makefile Change Library Names Not To Conflict With Others When Installed 2004-10-27 23:18:45 +00:00
ScheduleDAG.cpp Remove and simplify some more machineinstr/machineoperand stuff. 2006-05-04 18:16:01 +00:00
ScheduleDAGList.cpp Initial support for register pressure aware scheduling. The register reduction 2006-05-04 19:16:39 +00:00
ScheduleDAGSimple.cpp Move simple-selector-specific types to the simple selector. 2006-03-10 07:51:18 +00:00
SelectionDAG.cpp Fix Regression/CodeGen/Generic/2006-04-26-SetCCAnd.ll and 2006-04-27 05:01:07 +00:00
SelectionDAGISel.cpp Finish up the initial jump table implementation by allowing jump tables to 2006-05-03 03:48:02 +00:00
SelectionDAGPrinter.cpp print arbitrary constant pool entries 2006-03-05 09:38:03 +00:00
TargetLowering.cpp Refactor TargetMachine, pushing handling of TargetData into the target-specific subclasses. This has one caller-visible change: getTargetData() now returns a pointer instead of a reference. 2006-05-03 01:29:57 +00:00