Evan Cheng 14a6db8bd9 Initial support for register pressure aware scheduling. The register reduction ... scheduler can go into a "vertical mode" (i.e. traversing up the two-address chain, etc.) when the register pressure is low. This does seem to reduce the number of spills in the cases I've looked at. But with x86, it's no guarantee the performance of the code improves. It can be turned on with -sched-vertically option. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28108 91177308-0d34-0410-b5e6-96231b3b80d8		2006-05-04 19:16:39 +00:00
..
SelectionDAG	Initial support for register pressure aware scheduling. The register reduction	2006-05-04 19:16:39 +00:00
AsmPrinter.cpp	Refactor TargetMachine, pushing handling of TargetData into the target-specific subclasses. This has one caller-visible change: getTargetData() now returns a pointer instead of a reference.	2006-05-03 01:29:57 +00:00
BranchFolding.cpp
DwarfWriter.cpp	Refactor TargetMachine, pushing handling of TargetData into the target-specific subclasses. This has one caller-visible change: getTargetData() now returns a pointer instead of a reference.	2006-05-03 01:29:57 +00:00
ELFWriter.cpp	Suck block address tracking out of targets into the JIT Emitter. This	2006-05-03 17:10:41 +00:00
IntrinsicLowering.cpp	Handle new forms of llvm.dbg intrinsics.	2006-03-23 18:06:46 +00:00
LiveInterval.cpp
LiveIntervalAnalysis.cpp	Move some methods out of MachineInstr into MachineOperand	2006-05-04 17:52:23 +00:00
LiveVariables.cpp	Remove a bunch more dead V9 specific stuff	2006-05-04 01:26:39 +00:00
MachineBasicBlock.cpp	Remove and simplify some more machineinstr/machineoperand stuff.	2006-05-04 18:16:01 +00:00
MachineDebugInfo.cpp	Expand some code with temporary variables to rid ourselves of the warning	2006-04-13 18:29:58 +00:00
MachineFunction.cpp	Refactor TargetMachine, pushing handling of TargetData into the target-specific subclasses. This has one caller-visible change: getTargetData() now returns a pointer instead of a reference.	2006-05-03 01:29:57 +00:00
MachineInstr.cpp	Remove redundancy and a level of indirection when creating machine operands	2006-05-04 19:14:44 +00:00
Makefile
Passes.cpp
PHIElimination.cpp	Add support for targets (like Alpha) that have terminator instructions which	2006-01-04 07:12:21 +00:00
PhysRegTracker.h
PrologEpilogInserter.cpp	Foundation for call frame information.	2006-04-07 16:34:46 +00:00
RegAllocLinearScan.cpp	Add some comments.	2006-03-25 23:00:56 +00:00
RegAllocLocal.cpp	Move some methods out of MachineInstr into MachineOperand	2006-05-04 17:52:23 +00:00
RegAllocSimple.cpp	Move some methods out of MachineInstr into MachineOperand	2006-05-04 17:52:23 +00:00
TwoAddressInstructionPass.cpp	Move some methods out of MachineInstr into MachineOperand	2006-05-04 17:52:23 +00:00
UnreachableBlockElim.cpp
VirtRegMap.cpp	Move some methods out of MachineInstr into MachineOperand	2006-05-04 17:52:23 +00:00
VirtRegMap.h	Fix a latent bug that my spiller patch last week exposed: we were leaving	2006-05-01 22:03:24 +00:00