llvm-6502/lib/Target/Mips
Akira Hatanaka 1ad175e7e0 Add DWARF numbers of 64-bit registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149583 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02 02:56:14 +00:00
..
AsmParser Add the skeleton of an asm parser for mips. 2012-01-11 03:56:41 +00:00
InstPrinter Tidy up. Simplify logic. No functional change intended. 2011-12-19 19:52:25 +00:00
MCTargetDesc Ensure .AliasedSymbol() is called on all uses of getSymbol(). Affects ARM and MIPS ELF backends. 2012-01-28 15:58:32 +00:00
TargetInfo
CMakeLists.txt Target/Mips: Unbreak CMake build. 2012-01-25 03:15:46 +00:00
LLVMBuild.txt Add the skeleton of an asm parser for mips. 2012-01-11 03:56:41 +00:00
Makefile Add the skeleton of an asm parser for mips. 2012-01-11 03:56:41 +00:00
Mips64InstrInfo.td Lower 64-bit immediates using MipsAnalyzeImmediate that has just been added. 2012-01-25 03:01:35 +00:00
Mips.h
Mips.td Add definition of WSBH (Word Swap Bytes within Halfwords), which is an 2011-12-20 23:47:44 +00:00
MipsAnalyzeImmediate.cpp Add class MipsAnalyzeImmediate which comes up with an instruction sequence to 2012-01-25 01:43:36 +00:00
MipsAnalyzeImmediate.h MipsAnalyzeImmediate.h: Fix to add DataTypes.h for msvc. 2012-01-25 03:34:41 +00:00
MipsAsmPrinter.cpp Cleanup Mips code and rename some variables. Patch by Jack Carter 2011-12-30 21:09:41 +00:00
MipsAsmPrinter.h
MipsCallingConv.td
MipsCodeEmitter.cpp Widen the instruction encoder that TblGen emits to a 64 bits, which should accomodate every target I can think of offhand. 2012-01-24 18:37:29 +00:00
MipsCondMov.td
MipsDelaySlotFiller.cpp Tidy up. Simplify logic. No functional change intended. 2011-12-19 19:52:25 +00:00
MipsEmitGPRestore.cpp
MipsExpandPseudo.cpp
MipsFrameLowering.cpp Mark 64-bit register RA_64 unused too. 2012-01-25 04:19:22 +00:00
MipsFrameLowering.h
MipsInstrFormats.td
MipsInstrFPU.td Pattern for f32 to i64 conversion. 2012-01-24 22:05:25 +00:00
MipsInstrInfo.cpp Add MachineMemOperands to instructions generated in storeRegToStackSlot or 2011-12-24 03:11:18 +00:00
MipsInstrInfo.h
MipsInstrInfo.td 64-bit sign extension in register instructions. 2012-01-24 21:41:09 +00:00
MipsISelDAGToDAG.cpp Lower 64-bit immediates using MipsAnalyzeImmediate that has just been added. 2012-01-25 03:01:35 +00:00
MipsISelLowering.cpp Sign-extend 32-bit integer arguments when they are passed in 64-bit registers, 2012-01-24 23:18:43 +00:00
MipsISelLowering.h
MipsJITInfo.cpp Removing unused default switch cases in switches over enums that already account for all enumeration values explicitly. 2012-01-16 23:24:27 +00:00
MipsJITInfo.h
MipsMachineFunction.cpp Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch 2011-12-20 02:50:00 +00:00
MipsMachineFunction.h Remove VectorExtras. This unused helper was written for a type of API that is discouraged now. 2012-01-07 19:42:13 +00:00
MipsMCInstLower.cpp Ignore register mask operands when lowering instructions to MC. 2012-01-18 23:52:19 +00:00
MipsMCInstLower.h
MipsRegisterInfo.cpp Modify MipsRegisterInfo::eliminateFrameIndex to use MipsAnalyzeImmediate to 2012-01-25 03:55:10 +00:00
MipsRegisterInfo.h
MipsRegisterInfo.td Add DWARF numbers of 64-bit registers. 2012-02-02 02:56:14 +00:00
MipsRelocations.h Improve Mips JIT. 2011-12-30 21:04:30 +00:00
MipsSchedule.td
MipsSelectionDAGInfo.cpp
MipsSelectionDAGInfo.h
MipsSubtarget.cpp Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch 2011-12-20 02:50:00 +00:00
MipsSubtarget.h Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch 2011-12-20 02:50:00 +00:00
MipsTargetMachine.cpp Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch 2011-12-20 02:50:00 +00:00
MipsTargetMachine.h Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch 2011-12-20 02:50:00 +00:00
MipsTargetObjectFile.cpp
MipsTargetObjectFile.h