llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-01-17 21:35:07 +00:00

History

Brian Gaeke 1df468ea9b Simplify copyConstantToRegister() for longs, using a pair of recursive calls.

Copy constant-pool entries' addresses into registers before loading out of them,
to avoid errors from the assembler.
Handle loading call args past the 6th one off the stack.
Add IMPLICIT_DEF pseudo-instrs for double and long arguments passed in register
pairs.
Use FpMOVD to copy doubles around instead of the horrible store-load thing we
were doing before.
Handle 'ret double' and 'ret long'.
Fix a bug in handling 'and/or/xor long'.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16577 91177308-0d34-0410-b5e6-96231b3b80d8

2004-09-29 03:34:41 +00:00

DelaySlotFiller.cpp

Back to compiling land for v8

2004-09-02 02:37:43 +00:00

FPMover.cpp

Pass which converts FpMOVD (double move pseudoinstructions) to pairs

2004-09-29 03:24:34 +00:00

Makefile

Fix file header path

2004-09-22 21:29:12 +00:00

README.txt

Update the To-Do list according to my notes + assertions

2004-08-06 04:38:13 +00:00

Sparc.h

Add createSparcV8FPMoverPass().

2004-09-29 03:25:39 +00:00

Sparc.td

Prettify formatting of the file, adjust paths to making V8 a subdir of Sparc

2004-09-22 20:09:29 +00:00

SparcAsmPrinter.cpp

Put quotes around argument to .section directive.

2004-09-29 03:25:40 +00:00

SparcInstrFormats.td

Combine the F2 and F3 instruction classes into one file for simplicity

2004-09-22 21:38:42 +00:00

SparcInstrInfo.cpp

Fix bug recognizing moves: isMoveInstr should only treat ORs with %g0 as

2004-09-29 03:28:15 +00:00

SparcInstrInfo.h

…

SparcInstrInfo.td

Add new FpMOVD pseudo-instruction, used to move doubles around.

2004-09-29 03:27:29 +00:00

SparcRegisterInfo.cpp

Use FpMOVD pseudo-instruction to move doubles around.

2004-09-29 03:27:30 +00:00

SparcRegisterInfo.h

Code insertion methods now return void instead of an int.

2004-08-15 22:15:11 +00:00

SparcRegisterInfo.td

SparcV8 int regs are not only 32-bits in width, but they are 32-bit aligned!

2004-09-27 18:22:18 +00:00

SparcTargetMachine.cpp

Fix double and long alignment.

2004-09-29 03:26:27 +00:00

SparcTargetMachine.h

…

SparcV8CodeEmitter.cpp

…

SparcV8ISelSimple.cpp

Simplify copyConstantToRegister() for longs, using a pair of recursive calls.

2004-09-29 03:34:41 +00:00

SparcV8JITInfo.h

…

README.txt

SparcV8 backend skeleton
------------------------

This directory houses a 32-bit SPARC V8 backend employing a expander-based
instruction selector.  It is not yet functionally complete.  Watch
this space for more news coming soon!

To-do
-----

* support 64-bit (double FP, long, ulong) arguments to functions
* support functions with more than 6 args
* support setcc on longs
* support basic binary operations on longs
* support casting <=32-bit integers, bools to long
* support casting 64-bit integers to FP types

$Date$