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absaddr-store.ll
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Hexagon: Use multiclass for absolute addressing mode stores.
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2013-02-05 18:15:34 +00:00 |
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absimm.ll
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Hexagon: Remove duplicate instructions to handle global/immediate values
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2013-04-23 17:11:46 +00:00 |
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adde.ll
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Hexagon: Expand addc, adde, subc and sube.
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2013-03-05 19:04:47 +00:00 |
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always-ext.ll
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Hexagon: Use multiclass for combine and STri[bhwd]_shl_V4 instructions.
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2013-04-23 21:17:40 +00:00 |
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args.ll
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Hexagon: Pass to replace tranfer/copy instructions into combine instruction
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2013-05-14 18:54:06 +00:00 |
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ashift-left-right.ll
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Hexagon: Use multiclass for aslh, asrh, sxtb, sxth, zxtb and zxth.
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2013-03-26 15:43:57 +00:00 |
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block-addr.ll
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Hexagon: Add support to lower block address.
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2013-03-07 19:10:28 +00:00 |
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BranchPredict.ll
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Hexagon: Test case to check if branch probabilities are properly reflected in
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2013-05-14 15:50:49 +00:00 |
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cext-check.ll
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Hexagon: Move HexagonMCInst.h to MCTargetDesc/HexagonMCInst.h.
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2013-02-20 16:13:27 +00:00 |
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cext-valid-packet1.ll
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Hexagon: Add constant extender support framework.
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2013-03-01 17:37:13 +00:00 |
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cext-valid-packet2.ll
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Hexagon: Add constant extender support framework.
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2013-03-01 17:37:13 +00:00 |
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cmp_pred2.ll
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Hexagon: Remove assembler mapped instruction definitions.
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2013-04-23 19:15:55 +00:00 |
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cmp_pred_reg.ll
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Hexagon: Use TFR_cond with cmpb.[eq,gt,gtu] to handle
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2013-02-05 19:20:45 +00:00 |
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cmp_pred.ll
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Hexagon: Use TFR_cond with cmpb.[eq,gt,gtu] to handle
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2013-02-05 19:20:45 +00:00 |
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cmp-to-genreg.ll
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Hexagon: Add V4 compare instructions. Enable relationship mapping
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2013-02-05 16:42:24 +00:00 |
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cmp-to-predreg.ll
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Hexagon: Add V4 compare instructions. Enable relationship mapping
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2013-02-05 16:42:24 +00:00 |
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cmpb_pred.ll
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TBAA: remove !tbaa from testing cases if not used.
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2013-04-30 17:52:57 +00:00 |
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combine_ir.ll
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Hexagon - Add peephole optimizations for zero extends.
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2013-05-02 20:22:51 +00:00 |
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combine.ll
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convertdptoint.ll
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convertdptoll.ll
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convertsptoint.ll
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convertsptoll.ll
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ctlz-cttz-ctpop.ll
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Hexagon: Expand cttz, ctlz, and ctpop for now.
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2013-02-21 19:39:40 +00:00 |
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dadd.ll
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dmul.ll
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double.ll
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doubleconvert-ieee-rnd-near.ll
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dsub.ll
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dualstore.ll
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Hexagon: Add encoding bits to the TFR64 instructions.
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2013-03-05 18:42:28 +00:00 |
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extload-combine.ll
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Hexagon: Add patterns to generate 'combine' instructions.
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2013-05-14 17:16:38 +00:00 |
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fadd.ll
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fcmp.ll
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float.ll
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floatconvert-ieee-rnd-near.ll
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fmul.ll
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frame.ll
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fsub.ll
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fusedandshift.ll
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gp-plus-offset-load.ll
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Hexagon: Use absolute addressing mode loads/stores for global+offset
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2013-02-13 21:38:46 +00:00 |
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gp-plus-offset-store.ll
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Hexagon: Use absolute addressing mode loads/stores for global+offset
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2013-02-13 21:38:46 +00:00 |
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gp-rel.ll
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Hexagon: Use multiclass for gp-relative instructions.
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2013-03-28 16:25:57 +00:00 |
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hwloop-cleanup.ll
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Extend Hexagon hardware loop generation to handle various additional cases:
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2013-02-11 21:37:55 +00:00 |
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hwloop-const.ll
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TBAA: remove !tbaa from testing cases if not used.
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2013-04-30 17:52:57 +00:00 |
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hwloop-dbg.ll
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TBAA: remove !tbaa from testing cases if not used.
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2013-04-30 17:52:57 +00:00 |
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hwloop-le.ll
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Extend Hexagon hardware loop generation to handle various additional cases:
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2013-02-11 21:37:55 +00:00 |
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hwloop-lt1.ll
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Extend Hexagon hardware loop generation to handle various additional cases:
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2013-02-11 21:37:55 +00:00 |
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hwloop-lt.ll
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Extend Hexagon hardware loop generation to handle various additional cases:
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2013-02-11 21:37:55 +00:00 |
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hwloop-ne.ll
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Extend Hexagon hardware loop generation to handle various additional cases:
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2013-02-11 21:37:55 +00:00 |
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i1_VarArg.ll
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Hexagon: Handle i8, i16 and i1 Var Args.
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2013-03-07 20:28:34 +00:00 |
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i8_VarArg.ll
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Hexagon: Handle i8, i16 and i1 Var Args.
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2013-03-07 20:28:34 +00:00 |
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i16_VarArg.ll
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Hexagon: Handle i8, i16 and i1 Var Args.
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2013-03-07 20:28:34 +00:00 |
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idxload-with-zero-offset.ll
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Hexagon: Test case to confirm generation of indexed loads with zero offset.
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2013-02-01 16:40:06 +00:00 |
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indirect-br.ll
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Hexagon: Add support to lower block address.
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2013-03-07 19:10:28 +00:00 |
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lit.local.cfg
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macint.ll
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memops1.ll
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Hexagon: Add and enable memops setbit, clrbit, &,|,+,- for byte, short, and word.
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2013-03-22 18:41:34 +00:00 |
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memops2.ll
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TBAA: remove !tbaa from testing cases if not used.
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2013-04-30 17:52:57 +00:00 |
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memops3.ll
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TBAA: remove !tbaa from testing cases if not used.
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2013-04-30 17:52:57 +00:00 |
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memops.ll
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Hexagon: Add and enable memops setbit, clrbit, &,|,+,- for byte, short, and word.
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2013-03-22 18:41:34 +00:00 |
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misaligned-access.ll
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Hexagon: Removed asserts regarding alignment and offset.
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2013-03-14 19:08:03 +00:00 |
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mpy.ll
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newvaluejump2.ll
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newvaluejump.ll
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Remove extra MayLoad/MayStore flags from atomic_load/store.
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2012-08-28 03:11:32 +00:00 |
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newvaluestore.ll
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Porting Hexagon MI Scheduler to the new API.
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2012-09-04 14:49:56 +00:00 |
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opt-fabs.ll
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Add test triples to fix win32 failures. Revert workaround from r161292.
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2012-08-08 20:31:37 +00:00 |
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opt-fneg.ll
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packetize_cond_inst.ll
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Hexagon: ArePredicatesComplement should not restrict itself to TFRs.
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2013-05-14 16:36:34 +00:00 |
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postinc-load.ll
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In hexagon convertToHardwareLoop, don't deref end() iterator
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2012-12-07 21:03:15 +00:00 |
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postinc-store.ll
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Hexagon: Add testcase for post-increment store instructions.
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2013-02-05 18:23:51 +00:00 |
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pred-absolute-store.ll
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Hexagon: Add support to generate predicated absolute addressing mode
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2013-02-12 16:06:23 +00:00 |
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pred-gp.ll
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Hexagon: Fix switch cases in HexagonVLIWPacketizer.cpp.
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2013-05-10 20:27:34 +00:00 |
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pred-instrs.ll
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Hexagon: Use relation map for getMatchingCondBranchOpcode() and
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2013-05-09 18:25:44 +00:00 |
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predicate-copy.ll
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Hexagon: add support for predicate-GPR copies.
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2013-02-13 22:56:34 +00:00 |
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remove_lsr.ll
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TBAA: remove !tbaa from testing cases if not used.
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2013-04-30 17:52:57 +00:00 |
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simpletailcall.ll
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[Hexagon] Don't mark callee saved registers as clobbered by a tail call
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2012-08-13 19:54:01 +00:00 |
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split-const32-const64.ll
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Hexagon: Fix Small Data support to handle -G 0 correctly.
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2013-05-07 19:53:00 +00:00 |
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static.ll
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Porting Hexagon MI Scheduler to the new API.
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2012-09-04 14:49:56 +00:00 |
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struct_args_large.ll
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struct_args.ll
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Hexagon: Add V4 combine instructions and some more Def Pats for V2.
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2013-02-04 15:52:56 +00:00 |
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sube.ll
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Hexagon: Expand addc, adde, subc and sube.
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2013-03-05 19:04:47 +00:00 |
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tfr-to-combine.ll
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Hexagon: Pass to replace tranfer/copy instructions into combine instruction
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2013-05-14 18:54:06 +00:00 |
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union-1.ll
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Hexagon - Add peephole optimizations for zero extends.
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2013-05-02 20:22:51 +00:00 |
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vaddh.ll
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validate-offset.ll
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Add indexed load/store instructions for offset validation check.
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2013-01-17 18:42:37 +00:00 |
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zextloadi1.ll
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Hexagon: Add patterns for zero extended loads from i1->i64.
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2013-03-08 14:15:15 +00:00 |
a29a8965e2