llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-14 11:32:34 +00:00

History

Brian Gaeke 374b36d5cf Tell the target description that calls clobber registers O0...O5. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16594 91177308-0d34-0410-b5e6-96231b3b80d8		2004-09-29 20:45:05 +00:00
..
DelaySlotFiller.cpp	Back to compiling land for v8	2004-09-02 02:37:43 +00:00
FPMover.cpp	Pass which converts FpMOVD (double move pseudoinstructions) to pairs	2004-09-29 03:24:34 +00:00
Makefile	Fix file header path	2004-09-22 21:29:12 +00:00
README.txt	add results	2004-09-29 03:48:55 +00:00
SparcV8.h	Add createSparcV8FPMoverPass().	2004-09-29 03:25:39 +00:00
SparcV8.td	Prettify formatting of the file, adjust paths to making V8 a subdir of Sparc	2004-09-22 20:09:29 +00:00
SparcV8AsmPrinter.cpp	Don't use .quad to output double constants. The assembler must have a bug or	2004-09-29 19:59:06 +00:00
SparcV8CodeEmitter.cpp
SparcV8InstrFormats.td	Combine the F2 and F3 instruction classes into one file for simplicity	2004-09-22 21:38:42 +00:00
SparcV8InstrInfo.cpp	Recognize FpMOVD as a move.	2004-09-29 16:45:47 +00:00
SparcV8InstrInfo.h	I think that V8 should coallesce registers, don't you?	2004-07-25 06:19:04 +00:00
SparcV8InstrInfo.td	Tell the target description that calls clobber registers O0...O5.	2004-09-29 20:45:05 +00:00
SparcV8ISelSimple.cpp	Simplify copyConstantToRegister() for longs, using a pair of recursive calls.	2004-09-29 03:34:41 +00:00
SparcV8JITInfo.h
SparcV8RegisterInfo.cpp	Use FpMOVD pseudo-instruction to move doubles around.	2004-09-29 03:27:30 +00:00
SparcV8RegisterInfo.h	Code insertion methods now return void instead of an int.	2004-08-15 22:15:11 +00:00
SparcV8RegisterInfo.td	SparcV8 int regs are not only 32-bits in width, but they are 32-bit aligned!	2004-09-27 18:22:18 +00:00
SparcV8TargetMachine.cpp	Fix double and long alignment.	2004-09-29 03:26:27 +00:00
SparcV8TargetMachine.h	Adjust to new TM interfaces	2004-06-02 05:47:26 +00:00

README.txt

SparcV8 backend skeleton
------------------------

This directory houses a 32-bit SPARC V8 backend employing a expander-based
instruction selector.  It is not yet functionally complete.  Watch
this space for more news coming soon!

Current shootout results as of 28-Sept-2004
-------------------------------------------

Working: ackermann fib2 hash hello lists matrix methcall nestedloop
         objinst sieve strcat
Broken: ary3 heapsort random 

To-do
-----

* support 64-bit (double FP, long, ulong) arguments to functions
* support functions with more than 6 args
* support setcc on longs
* support basic binary operations on longs
* support casting <=32-bit integers, bools to long
* support casting 64-bit integers to FP types

$Date$