.. |
InstPrinter
|
R600: Bank Swizzle now display SCL equivalent
|
2013-06-29 19:32:29 +00:00 |
MCTargetDesc
|
Remove unused stdio.h includes
|
2013-08-18 08:29:51 +00:00 |
TargetInfo
|
R600: Remove unnecessary include
|
2013-06-07 20:28:43 +00:00 |
AMDGPU.h
|
R600/SI: Convert v16i8 resource descriptors to i128
|
2013-08-14 23:24:45 +00:00 |
AMDGPU.td
|
R600: Rework subtarget info and remove AMDILDevice classes
|
2013-06-07 20:37:48 +00:00 |
AMDGPUAsmPrinter.cpp
|
R600/SI: Initial local memory support
|
2013-07-10 16:37:07 +00:00 |
AMDGPUAsmPrinter.h
|
|
|
AMDGPUCallingConv.td
|
R600/SI: Fix an obvious typo
|
2013-08-14 22:22:03 +00:00 |
AMDGPUConvertToISA.cpp
|
|
|
AMDGPUFrameLowering.cpp
|
R600: Fix calculation of stack offset in AMDGPUFrameLowering
|
2013-06-07 20:52:05 +00:00 |
AMDGPUFrameLowering.h
|
|
|
AMDGPUIndirectAddressing.cpp
|
Don't cache the instruction and register info from the TargetMachine, because
|
2013-06-07 20:28:55 +00:00 |
AMDGPUInstrInfo.cpp
|
R600: Use new getNamedOperandIdx function generated by TableGen
|
2013-06-25 21:22:18 +00:00 |
AMDGPUInstrInfo.h
|
R600: Use new getNamedOperandIdx function generated by TableGen
|
2013-06-25 21:22:18 +00:00 |
AMDGPUInstrInfo.td
|
R600: Add support for i16 and i8 global stores
|
2013-08-16 01:12:06 +00:00 |
AMDGPUInstructions.td
|
R600: Add support for i16 and i8 global stores
|
2013-08-16 01:12:06 +00:00 |
AMDGPUIntrinsics.td
|
R600: Add support for GROUP_BARRIER instruction
|
2013-06-28 15:46:59 +00:00 |
AMDGPUISelDAGToDAG.cpp
|
R600: Enable folding of inline literals into REQ_SEQUENCE instructions
|
2013-08-16 01:11:55 +00:00 |
AMDGPUISelLowering.cpp
|
R600: Remove unnecessary casts
|
2013-08-21 22:14:17 +00:00 |
AMDGPUISelLowering.h
|
R600: Add support for global vector stores with elements less than 32-bits
|
2013-08-16 01:12:11 +00:00 |
AMDGPUMachineFunction.cpp
|
Move string pointer from being a static class member to just a static global in the one file its needed in.
|
2013-07-17 00:31:35 +00:00 |
AMDGPUMachineFunction.h
|
Move string pointer from being a static class member to just a static global in the one file its needed in.
|
2013-07-17 00:31:35 +00:00 |
AMDGPUMCInstLower.cpp
|
|
|
AMDGPUMCInstLower.h
|
|
|
AMDGPURegisterInfo.cpp
|
R600/SI: Lower BUILD_VECTOR to REG_SEQUENCE v2
|
2013-08-14 23:24:32 +00:00 |
AMDGPURegisterInfo.h
|
R600/SI: Lower BUILD_VECTOR to REG_SEQUENCE v2
|
2013-08-14 23:24:32 +00:00 |
AMDGPURegisterInfo.td
|
Make SubRegIndex size mandatory, following r183020.
|
2013-05-31 23:45:26 +00:00 |
AMDGPUSubtarget.cpp
|
Remove unused stdio.h includes
|
2013-08-18 08:29:51 +00:00 |
AMDGPUSubtarget.h
|
R600: Rework subtarget info and remove AMDILDevice classes
|
2013-06-07 20:37:48 +00:00 |
AMDGPUTargetMachine.cpp
|
R600/SI: Convert v16i8 resource descriptors to i128
|
2013-08-14 23:24:45 +00:00 |
AMDGPUTargetMachine.h
|
SimplifyCFG: Use parallel-and and parallel-or mode to consolidate branch conditions
|
2013-07-27 00:01:07 +00:00 |
AMDGPUTargetTransformInfo.cpp
|
SimplifyCFG: Use parallel-and and parallel-or mode to consolidate branch conditions
|
2013-07-27 00:01:07 +00:00 |
AMDILBase.td
|
R600: Move Subtarget feature definitions into AMDGPU.td
|
2013-06-07 20:28:49 +00:00 |
AMDILCFGStructurizer.cpp
|
R600: Remove predicated_break inst
|
2013-07-31 19:31:14 +00:00 |
AMDILInstrInfo.td
|
R600: Rework subtarget info and remove AMDILDevice classes
|
2013-06-07 20:37:48 +00:00 |
AMDILIntrinsicInfo.cpp
|
R600: Rework subtarget info and remove AMDILDevice classes
|
2013-06-07 20:37:48 +00:00 |
AMDILIntrinsicInfo.h
|
|
|
AMDILIntrinsics.td
|
|
|
AMDILISelLowering.cpp
|
Make some arrays 'static const'
|
2013-07-15 06:39:13 +00:00 |
AMDILRegisterInfo.td
|
|
|
CMakeLists.txt
|
R600/SI: Convert v16i8 resource descriptors to i128
|
2013-08-14 23:24:45 +00:00 |
LLVMBuild.txt
|
|
|
Makefile
|
|
|
Processors.td
|
Add a newline.
|
2013-07-01 21:31:10 +00:00 |
R600ControlFlowFinalizer.cpp
|
R600: Add IsExport bit to TableGen instruction definitions
|
2013-08-16 01:11:51 +00:00 |
R600Defines.h
|
R600: Add IsExport bit to TableGen instruction definitions
|
2013-08-16 01:11:51 +00:00 |
R600EmitClauseMarkers.cpp
|
Use SmallVectorImpl& instead of SmallVector to avoid repeating small vector size.
|
2013-07-14 04:42:23 +00:00 |
R600ExpandSpecialInstrs.cpp
|
R600: Remove predicated_break inst
|
2013-07-31 19:31:14 +00:00 |
R600InstrFormats.td
|
R600: Add IsExport bit to TableGen instruction definitions
|
2013-08-16 01:11:51 +00:00 |
R600InstrInfo.cpp
|
R600: Add IsExport bit to TableGen instruction definitions
|
2013-08-16 01:11:51 +00:00 |
R600InstrInfo.h
|
R600: Add IsExport bit to TableGen instruction definitions
|
2013-08-16 01:11:51 +00:00 |
R600Instructions.td
|
R600: Add support for i16 and i8 global stores
|
2013-08-16 01:12:06 +00:00 |
R600Intrinsics.td
|
|
|
R600ISelLowering.cpp
|
R600: Expand vector float operations for both SI and R600
|
2013-08-16 23:51:24 +00:00 |
R600ISelLowering.h
|
R600: Use DAG lowering pass to handle fcos/fsin
|
2013-07-09 15:03:11 +00:00 |
R600MachineFunctionInfo.cpp
|
|
|
R600MachineFunctionInfo.h
|
Move passes from namespace llvm into anonymous namespaces. Sort includes while there.
|
2013-05-23 17:10:37 +00:00 |
R600MachineScheduler.cpp
|
Revert "R600: Non vector only instruction can be scheduled on trans unit"
|
2013-07-31 20:43:27 +00:00 |
R600MachineScheduler.h
|
Revert "R600: Non vector only instruction can be scheduled on trans unit"
|
2013-07-31 20:43:27 +00:00 |
R600OptimizeVectorRegisters.cpp
|
R600: Enable folding of inline literals into REQ_SEQUENCE instructions
|
2013-08-16 01:11:55 +00:00 |
R600Packetizer.cpp
|
Revert "R600: Non vector only instruction can be scheduled on trans unit"
|
2013-07-31 20:43:27 +00:00 |
R600RegisterInfo.cpp
|
R600/SI: Lower BUILD_VECTOR to REG_SEQUENCE v2
|
2013-08-14 23:24:32 +00:00 |
R600RegisterInfo.h
|
R600/SI: Lower BUILD_VECTOR to REG_SEQUENCE v2
|
2013-08-14 23:24:32 +00:00 |
R600RegisterInfo.td
|
R600: Add 64-bit float load/store support
|
2013-08-01 15:23:42 +00:00 |
R600Schedule.td
|
R600: Add local memory support via LDS
|
2013-06-28 15:47:08 +00:00 |
R600TextureIntrinsicsReplacer.cpp
|
R600: Fix possible use of an uninitialized variable
|
2013-08-17 00:06:51 +00:00 |
SIAnnotateControlFlow.cpp
|
Add 'const' qualifiers to static const char* variables.
|
2013-07-16 01:17:10 +00:00 |
SIDefines.h
|
R600/SI: Fix broken encoding of DS_WRITE_B32
|
2013-08-16 16:19:24 +00:00 |
SIFixSGPRCopies.cpp
|
R600/SI: Use VSrc_* register classes as the default classes for types
|
2013-08-06 23:08:28 +00:00 |
SIInsertWaits.cpp
|
R600/SI: Fix broken encoding of DS_WRITE_B32
|
2013-08-16 16:19:24 +00:00 |
SIInstrFormats.td
|
R600/SI: Fix broken encoding of DS_WRITE_B32
|
2013-08-16 16:19:24 +00:00 |
SIInstrInfo.cpp
|
Remove unused stdio.h includes
|
2013-08-18 08:29:51 +00:00 |
SIInstrInfo.h
|
R600/SI: Fix broken encoding of DS_WRITE_B32
|
2013-08-16 16:19:24 +00:00 |
SIInstrInfo.td
|
Revert "R600/SI: Fix incorrect encoding of DS_WRITE_B32 instructions"
|
2013-08-16 01:18:43 +00:00 |
SIInstructions.td
|
R600/SI: Add pattern for xor of i1
|
2013-08-16 16:19:31 +00:00 |
SIIntrinsics.td
|
R600/SI: Convert v16i8 resource descriptors to i128
|
2013-08-14 23:24:45 +00:00 |
SIISelLowering.cpp
|
R600: Allocate memoperand in the MachienFunction so it doesn't leak.
|
2013-08-16 14:48:09 +00:00 |
SIISelLowering.h
|
R600/SI: Improve legalization of vector operations
|
2013-08-14 23:25:00 +00:00 |
SILowerControlFlow.cpp
|
R600/SI: Initial support for LDS/GDS instructions
|
2013-07-10 16:36:43 +00:00 |
SIMachineFunctionInfo.cpp
|
|
|
SIMachineFunctionInfo.h
|
|
|
SIRegisterInfo.cpp
|
R600/SI: Choose the correct MOV instruction for copying immediates
|
2013-08-14 23:24:24 +00:00 |
SIRegisterInfo.h
|
R600/SI: Choose the correct MOV instruction for copying immediates
|
2013-08-14 23:24:24 +00:00 |
SIRegisterInfo.td
|
R600/SI: Convert v16i8 resource descriptors to i128
|
2013-08-14 23:24:45 +00:00 |
SISchedule.td
|
|
|
SITypeRewriter.cpp
|
R600/SI: Replace v1i32 type with i32 in imageload and sample intrinsics
|
2013-08-14 23:24:53 +00:00 |