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llvm-6502/lib/Target/AArch64
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Matthias Braun 8ce6c58e41 Rename TargetSubtargetInfo::enablePostMachineScheduler() to enablePostRAScheduler() 
r213101 changed the behaviour of this method to not only affect the
PostMachineScheduler scheduler but also the PostRAScheduler scheduler,
renaming should make this fact clear. Also document that the preferred
way is to specify this in the scheduling model instead of overriding
this method.

Differential Revision: http://reviews.llvm.org/D10427

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239659 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-13 03:42:16 +00:00
..
AsmParser [AArch64] AsmParser should be case insensitive about accepting vector register names. 2015-06-08 21:32:16 +00:00
Disassembler [AArch64] Add v8.1a atomic instructions 2015-06-02 10:58:41 +00:00
InstPrinter Remove unnecessary conversion from StringRef to std::string and back to StringRef. NFC. 2015-06-10 02:07:37 +00:00
MCTargetDesc AArch64: map bare-metal arm64-macho triple to MachO MC layer. 2015-06-12 23:37:11 +00:00
TargetInfo AArch64: stop trying to take control of all UnknownArch triples. 2014-08-08 08:27:44 +00:00
Utils ARM]: Add support for MMFR4_EL1 in assembler 2015-06-08 15:01:11 +00:00
AArch64.h This reverts commit r239529 and r239514. 2015-06-11 17:30:33 +00:00
AArch64.td [AArch64] Rename v8.1a from "extension" to "architecture" 2015-04-01 14:49:29 +00:00
AArch64A53Fix835769.cpp Use new MachineInstr mayLoadOrStore() API. 2015-05-21 21:59:57 +00:00
AArch64A57FPLoadBalancing.cpp unique_ptrs are unique already, no need to unique them any further. 2015-03-13 16:59:29 +00:00
AArch64AddressTypePromotion.cpp Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used. 2015-03-23 19:32:43 +00:00
AArch64AdvSIMDScalarPass.cpp MachineInstr: Change return value of getOpcode() to unsigned. 2015-05-18 20:27:55 +00:00
AArch64AsmPrinter.cpp MC: Add target hook to control symbol quoting 2015-06-09 00:31:39 +00:00
AArch64BranchRelaxation.cpp Migrate AArch64 except for TTI and AsmPrinter away from getSubtargetImpl. 2015-01-28 03:51:33 +00:00
AArch64CallingConvention.h Move DataLayout back to the TargetMachine from TargetSubtargetInfo 2015-01-26 19:03:15 +00:00
AArch64CallingConvention.td Move DataLayout back to the TargetMachine from TargetSubtargetInfo 2015-01-26 19:03:15 +00:00
AArch64CleanupLocalDynamicTLSPass.cpp Fix PR22408 - LLVM producing AArch64 TLS relocations that GNU linkers cannot handle yet. 2015-03-04 09:12:08 +00:00
AArch64CollectLOH.cpp Change range-based for-loops to be -Wrange-loop-analysis clean. 2015-04-15 01:21:15 +00:00
AArch64ConditionalCompares.cpp MachineInstr: Remove unused parameter. 2015-05-19 21:22:20 +00:00
AArch64ConditionOptimizer.cpp MachineInstr: Change return value of getOpcode() to unsigned. 2015-05-18 20:27:55 +00:00
AArch64DeadRegisterDefinitionsPass.cpp Remove 'virtual' keyword from methods markedwith 'override' keyword. 2014-08-30 16:48:34 +00:00
AArch64ExpandPseudoInsts.cpp Transfer implicit operands when expanding the RET_ReallyLR pseudo instruction. 2015-03-30 22:45:56 +00:00
AArch64FastISel.cpp Change Function::getIntrinsicID() to return an Intrinsic::ID. NFC. 2015-05-20 17:16:39 +00:00
AArch64FrameLowering.cpp MachineInstr: Change return value of getOpcode() to unsigned. 2015-05-18 20:27:55 +00:00
AArch64FrameLowering.h [ShrinkWrap] Add (a simplified version) of shrink-wrapping. 2015-05-05 17:38:16 +00:00
AArch64InstrAtomics.td Make use of isAtLeastRelease/Acquire in the ARM/AArch64 backends 2014-08-18 16:48:58 +00:00
AArch64InstrFormats.td [AArch64] Add v8.1a atomic instructions 2015-06-02 10:58:41 +00:00
AArch64InstrInfo.cpp [CodeGen] ArrayRef'ize cond/pred in various TII APIs. NFC. 2015-06-11 19:30:37 +00:00
AArch64InstrInfo.h [CodeGen] ArrayRef'ize cond/pred in various TII APIs. NFC. 2015-06-11 19:30:37 +00:00
AArch64InstrInfo.td AArch64: fix typo in SMIN far atomics and add tests 2015-06-02 18:37:20 +00:00
AArch64ISelDAGToDAG.cpp Re-commit of r238201 with fix for building with shared libraries. 2015-06-01 12:02:47 +00:00
AArch64ISelLowering.cpp AArch64: Use CMP;CCMP sequences for and/or/setcc trees. 2015-06-01 22:31:17 +00:00
AArch64ISelLowering.h AArch64: Use CMP;CCMP sequences for and/or/setcc trees. 2015-06-01 22:31:17 +00:00
AArch64LoadStoreOptimizer.cpp [AArch64] Remove an overly conservative check when generating store pairs. 2015-06-09 20:59:41 +00:00
AArch64MachineCombinerPattern.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
AArch64MachineFunctionInfo.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
AArch64MCInstLower.cpp MC: Clean up MCExpr naming. NFC. 2015-05-30 01:25:56 +00:00
AArch64MCInstLower.h Delete unused argument in AArch64MCInstLower constructor: it doesn't 2014-08-19 21:51:08 +00:00
AArch64PBQPRegAlloc.cpp Avoid copying LiveInterval, this could lead to a double-delete 2015-03-03 22:25:48 +00:00
AArch64PBQPRegAlloc.h [AArch64] Cleanup A57PBQPConstraints 2014-10-22 12:40:20 +00:00
AArch64PerfectShuffle.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
AArch64PromoteConstant.cpp Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used. 2015-03-23 19:32:43 +00:00
AArch64RegisterInfo.cpp [AArch64] Add support for dynamic stack alignment 2015-04-09 08:49:47 +00:00
AArch64RegisterInfo.h [AArch64] Add support for dynamic stack alignment 2015-04-09 08:49:47 +00:00
AArch64RegisterInfo.td [AArch64] Add v8.1a atomic instructions 2015-06-02 10:58:41 +00:00
AArch64SchedA53.td
AArch64SchedA57.td [AArch64] Changes some SchedAlias to WriteRes for Cortex-A57. 2015-04-10 13:19:27 +00:00
AArch64SchedA57WriteRes.td [AArch64] Refines the Cortex-A57 Machine Model 2014-09-29 21:27:36 +00:00
AArch64SchedCyclone.td
AArch64Schedule.td
AArch64SelectionDAGInfo.cpp Get the cached subtarget off the MachineFunction rather than 2015-02-20 08:39:06 +00:00
AArch64SelectionDAGInfo.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
AArch64StorePairSuppress.cpp Clean up the AArch64 store pair suppression pass initialization 2015-01-27 07:54:36 +00:00
AArch64Subtarget.cpp Replace string GNU Triples with llvm::Triple in MCSubtargetInfo and create*MCSubtargetInfo(). NFC. 2015-06-10 12:11:26 +00:00
AArch64Subtarget.h Rename TargetSubtargetInfo::enablePostMachineScheduler() to enablePostRAScheduler() 2015-06-13 03:42:16 +00:00
AArch64TargetMachine.cpp Replace string GNU Triples with llvm::Triple in TargetMachine. NFC. 2015-06-11 19:41:26 +00:00
AArch64TargetMachine.h Replace string GNU Triples with llvm::Triple in TargetMachine. NFC. 2015-06-11 19:41:26 +00:00
AArch64TargetObjectFile.cpp MC: Clean up MCExpr naming. NFC. 2015-05-30 01:25:56 +00:00
AArch64TargetObjectFile.h [AsmPrinter][TLOF] 32-bit MachO support for replacing GOT equivalents 2015-03-06 13:49:05 +00:00
AArch64TargetTransformInfo.cpp This reverts commit r239529 and r239514. 2015-06-11 17:30:33 +00:00
AArch64TargetTransformInfo.h This reverts commit r239529 and r239514. 2015-06-11 17:30:33 +00:00
CMakeLists.txt This reverts commit r239529 and r239514. 2015-06-11 17:30:33 +00:00
LLVMBuild.txt Re-commit of r238201 with fix for building with shared libraries. 2015-06-01 12:02:47 +00:00
Makefile