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522a181d69
llvm-6502/test/CodeGen/ARM
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Dale Johannesen 522a181d69 Remove a tail call, and move some CHECKs to the 
functions where they belong.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105449 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-04 01:01:04 +00:00
..
2006-11-10-CycleInDAG.ll
…
2007-01-19-InfiniteLoop.ll
…
2007-03-07-CombinerCrash.ll
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2007-03-13-InstrSched.ll
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2007-03-21-JoinIntervalsCrash.ll
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2007-03-26-RegScavengerAssert.ll
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2007-03-27-RegScavengerAssert.ll
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2007-03-30-RegScavengerAssert.ll
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2007-04-02-RegScavengerAssert.ll
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2007-04-03-PEIBug.ll
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2007-04-03-UndefinedSymbol.ll
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2007-04-30-CombinerCrash.ll
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2007-05-03-BadPostIndexedLd.ll
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2007-05-07-jumptoentry.ll
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2007-05-07-tailmerge-1.ll
Remove the -enable-sjlj-eh option, which doesn't do anything.
2010-05-02 15:36:26 +00:00
2007-05-09-tailmerge-2.ll
Remove the -enable-sjlj-eh option, which doesn't do anything.
2010-05-02 15:36:26 +00:00
2007-05-14-InlineAsmCstCrash.ll
…
2007-05-14-RegScavengerAssert.ll
…
2007-05-22-tailmerge-3.ll
Remove the -enable-sjlj-eh option, which doesn't do anything.
2010-05-02 15:36:26 +00:00
2007-05-23-BadPreIndexedStore.ll
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2007-05-31-RegScavengerInfiniteLoop.ll
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2007-08-15-ReuseBug.ll
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2008-02-04-LocalRegAllocBug.ll
Keep track of the last place a live virtreg was used.
2010-05-11 23:24:45 +00:00
2008-02-29-RegAllocLocal.ll
Keep track of the last place a live virtreg was used.
2010-05-11 23:24:45 +00:00
2008-03-05-SxtInRegBug.ll
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2008-03-07-RegScavengerAssert.ll
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2008-04-04-ScavengerAssert.ll
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2008-04-10-ScavengerAssert.ll
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2008-04-11-PHIofImpDef.ll
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2008-05-19-LiveIntervalsBug.ll
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2008-05-19-ScavengerAssert.ll
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2008-07-17-Fdiv.ll
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2008-07-24-CodeGenPrepCrash.ll
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2008-08-07-AsmPrintBug.ll
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2008-09-14-CoalescerBug.ll
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2008-09-17-CoalescerBug.ll
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2008-11-18-ScavengerAssert.ll
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2009-02-16-SpillerBug.ll
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2009-02-22-SoftenFloatVaArg.ll
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2009-02-27-SpillerBug.ll
…
2009-03-07-SpillerBug.ll
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2009-03-09-AddrModeBug.ll
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2009-04-06-AsmModifier.ll
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2009-04-08-AggregateAddr.ll
…
2009-04-08-FloatUndef.ll
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2009-04-08-FREM.ll
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2009-04-09-RegScavengerAsm.ll
…
2009-05-05-DAGCombineBug.ll
Correct some bogus target triples.
2010-05-07 17:03:48 +00:00
2009-05-07-RegAllocLocal.ll
Keep track of the last place a live virtreg was used.
2010-05-11 23:24:45 +00:00
2009-05-11-CodePlacementCrash.ll
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2009-05-18-InlineAsmMem.ll
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2009-06-02-ISelCrash.ll
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2009-06-04-MissingLiveIn.ll
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2009-06-12-RegScavengerAssert.ll
…
2009-06-15-RegScavengerAssert.ll
…
2009-06-19-RegScavengerAssert.ll
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2009-06-22-CoalescerBug.ll
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2009-06-30-RegScavengerAssert2.ll
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2009-06-30-RegScavengerAssert3.ll
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2009-06-30-RegScavengerAssert4.ll
…
2009-06-30-RegScavengerAssert5.ll
…
2009-06-30-RegScavengerAssert.ll
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2009-07-01-CommuteBug.ll
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2009-07-09-asm-p-constraint.ll
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2009-07-18-RewriterBug.ll
Use Unified Assembly Syntax for the ARM backend.
2009-11-09 00:11:35 +00:00
2009-07-22-ScavengerAssert.ll
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2009-07-22-SchedulerAssert.ll
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2009-07-29-VFP3Registers.ll
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2009-08-02-RegScavengerAssert-Neon.ll
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2009-08-04-RegScavengerAssert-2.ll
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2009-08-04-RegScavengerAssert.ll
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2009-08-15-RegScavenger-EarlyClobber.ll
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2009-08-15-RegScavengerAssert.ll
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2009-08-21-PostRAKill2.ll
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2009-08-21-PostRAKill3.ll
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2009-08-21-PostRAKill4.ll
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2009-08-21-PostRAKill.ll
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2009-08-23-linkerprivate.ll
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2009-08-26-ScalarToVector.ll
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2009-08-27-ScalarToVector.ll
…
2009-08-29-ExtractEltf32.ll
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2009-08-29-TooLongSplat.ll
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2009-08-31-LSDA-Name.ll
Start function numbering at 0.
2010-04-17 16:29:15 +00:00
2009-08-31-TwoRegShuffle.ll
…
2009-09-01-PostRAProlog.ll
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2009-09-09-AllOnes.ll
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2009-09-09-fpcmp-ole.ll
Use Unified Assembly Syntax for the ARM backend.
2009-11-09 00:11:35 +00:00
2009-09-10-postdec.ll
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2009-09-13-InvalidSubreg.ll
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2009-09-13-InvalidSuperReg.ll
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2009-09-20-LiveIntervalsBug.ll
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2009-09-21-LiveVariablesBug.ll
…
2009-09-22-LiveVariablesBug.ll
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2009-09-23-LiveVariablesBug.ll
…
2009-09-24-spill-align.ll
Use Unified Assembly Syntax for the ARM backend.
2009-11-09 00:11:35 +00:00
2009-09-27-CoalescerBug.ll
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2009-09-28-LdStOptiBug.ll
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2009-10-02-NEONSubregsBug.ll
Fix PR5367. QPR_8 is the super regclass of DPR_8 and SPR_8.
2009-11-03 05:52:54 +00:00
2009-10-21-InvalidFNeg.ll
…
2009-10-27-double-align.ll
Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrm
2010-03-17 17:52:21 +00:00
2009-10-30.ll
Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrm
2010-03-17 17:52:21 +00:00
2009-11-01-NeonMoves.ll
Use Unified Assembly Syntax for the ARM backend.
2009-11-09 00:11:35 +00:00
2009-11-02-NegativeLane.ll
Change CodeGen/ARM/2009-11-02-NegativeLane.ll to use 16-bit vector elements
2010-05-21 21:05:32 +00:00
2009-11-07-SubRegAsmPrinting.ll
move fconst[sd] to UAL. <rdar://7414913>
2009-11-23 21:08:25 +00:00
2009-11-13-CoalescerCrash.ll
Fix PR5410: LiveVariables lost subreg def:
2009-11-13 20:36:40 +00:00
2009-11-13-ScavengerAssert2.ll
Fix PR5412: Fix an inverted check and another missing sub-register check.
2009-11-14 02:09:09 +00:00
2009-11-13-ScavengerAssert.ll
Fix PR5411. Bug in UpdateKills. A reg def partially define its super-registers.
2009-11-13 23:16:41 +00:00
2009-11-13-VRRewriterCrash.ll
Add radar number.
2009-11-14 02:11:32 +00:00
2009-11-30-LiveVariablesBug.ll
Fix PR5614: parts of a physical register def may be killed the rest.
2009-12-01 00:44:45 +00:00
2009-12-02-vtrn-undef.ll
Recognize canonical forms of vector shuffles where the same vector is used for
2009-12-03 06:40:55 +00:00
2010-03-04-eabi-fp-spill.ll
pr6478: The frame pointer spill frame index is only defined when there is a
2010-03-04 21:42:36 +00:00
2010-03-04-stm-undef-addr.ll
pr6480: Don't try producing ld/st-multiple instructions when the address is
2010-03-04 21:04:38 +00:00
2010-03-18-ldm-rtrn.ll
pr6652: Use LDM to restore PC to the return address on ARMv4.
2010-03-20 22:20:40 +00:00
2010-04-07-DbgValueOtherTargets.ll
Split big test into multiple directories to cater to
2010-04-07 20:43:35 +00:00
2010-04-09-NeonSelect.ll
Add a testcase for svn r100568.
2010-04-09 18:29:29 +00:00
2010-04-13-v2f64SplitArg.ll
Handle a v2f64 formal parameter that is split between registers and memory
2010-04-13 22:03:22 +00:00
2010-04-14-SplitVector.ll
Don't custom lower bit converts to ARM VMOVDRRD or VMOVDRR when the operand
2010-04-14 20:45:23 +00:00
2010-04-15-ScavengerDebugValue.ll
Fix PR6847. RegScavenger should ignore DebugValues.
2010-04-15 20:28:39 +00:00
2010-05-14-IllegalType.ll
Allow TargetLowering::getRegClassFor() to be called on illegal types. Also
2010-05-15 02:18:07 +00:00
2010-05-17-DAGCombineAssert.ll
FIX PR7158. SimplifyVBinOp was asserting when it fails to constant fold (op (build_vector), (build_vector)).
2010-05-18 00:03:40 +00:00
2010-05-17-FastAllocCrash.ll
Avoid allocating the same physreg to multiple virtregs in one instruction.
2010-05-17 17:18:59 +00:00
2010-05-18-LocalAllocCrash.ll
Remember to update VirtRegLastUse when spilling without killing before a call.
2010-05-18 22:20:09 +00:00
2010-05-18-PostIndexBug.ll
Sink dag combine's post index load / store code that swap base ptr and index into the target hook. Only the target knows whether the swap is safe. In Thumb2 mode, the offset must be an immediate. rdar://7998649
2010-05-18 21:31:17 +00:00
2010-05-19-Shuffles.ll
Handle Neon v2f64 and v2i64 vector shuffles as register copies.
2010-05-20 18:39:53 +00:00
2010-05-20-NEONSpillCrash.ll
Add a -regalloc=default option that chooses a register allocator based on the -O
2010-05-27 23:57:25 +00:00
2010-05-21-BuildVector.ll
Recognize more BUILD_VECTORs and VECTOR_SHUFFLEs that can be implemented by
2010-05-22 00:23:12 +00:00
addrmode.ll
…
aliases.ll
emit jump table an alias ".set" directives through MCStreamer as
2010-01-26 21:53:08 +00:00
align.ll
Emit .comm alignment in bytes but .align in powers of 2 for ARM ELF.
2010-01-26 20:21:43 +00:00
alloca.ll
Convert to FileCheck, fixing failure due to tab change in the process.
2009-10-27 05:30:47 +00:00
argaddr.ll
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arguments2.ll
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arguments3.ll
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arguments4.ll
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arguments5.ll
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arguments6.ll
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arguments7.ll
Fix declarations in a few more tests.
2010-04-17 21:29:25 +00:00
arguments8.ll
Fix declarations in a few more tests.
2010-04-17 21:29:25 +00:00
arguments_f64_backfill.ll
Use Unified Assembly Syntax for the ARM backend.
2009-11-09 00:11:35 +00:00
arguments-nosplit-double.ll
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arguments-nosplit-i64.ll
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arguments.ll
Fix some more failures by converting to FileCheck.
2009-10-27 05:50:28 +00:00
arm-asm.ll
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arm-frameaddr.ll
Implement @llvm.returnaddress. rdar://8015977.
2010-05-22 01:47:14 +00:00
arm-negative-stride.ll
Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrm
2010-03-17 17:52:21 +00:00
arm-returnaddr.ll
LR is in GPR, not tGPR even in Thumb1 mode.
2010-05-24 18:00:18 +00:00
armv4.ll
Initial bits of ARMv4-only support.
2010-03-06 19:39:36 +00:00
bfc.ll
Fix some more failures by converting to FileCheck.
2009-10-27 05:50:28 +00:00
bfx.ll
Update ARM DAGtoDAG for matching UBFX instruction for unsigned bitfield
2010-04-22 23:24:18 +00:00
bic.ll
Forgot to alter RUN line when converting to FileCheck.
2009-11-22 13:09:48 +00:00
bits.ll
…
bx_fold.ll
…
call_nolink.ll
…
call.ll
Remove a tail call, and move some CHECKs to the
2010-06-04 01:01:04 +00:00
carry.ll
Fix some more failures by converting to FileCheck.
2009-10-27 05:50:28 +00:00
clz.ll
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compare-call.ll
Use Unified Assembly Syntax for the ARM backend.
2009-11-09 00:11:35 +00:00
constants.ll
Fix some more failures by converting to FileCheck.
2009-10-27 05:50:28 +00:00
cse-libcalls.ll
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ctors_dtors.ll
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ctz.ll
Test case for r93758.
2010-01-19 00:35:20 +00:00
dg.exp
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div.ll
fix copy/paste oops.
2010-05-05 21:07:46 +00:00
dyn-stackalloc.ll
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extloadi1.ll
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fabss.ll
Change ARM scheduling default to list-hybrid if the target supports floating point instructions (and is not using soft float).
2010-05-21 00:43:17 +00:00
fadds.ll
Change ARM scheduling default to list-hybrid if the target supports floating point instructions (and is not using soft float).
2010-05-21 00:43:17 +00:00
fcopysign.ll
Use Unified Assembly Syntax for the ARM backend.
2009-11-09 00:11:35 +00:00
fdivs.ll
Change ARM scheduling default to list-hybrid if the target supports floating point instructions (and is not using soft float).
2010-05-21 00:43:17 +00:00
fixunsdfdi.ll
Use Unified Assembly Syntax for the ARM backend.
2009-11-09 00:11:35 +00:00
fmacs.ll
Change ARM scheduling default to list-hybrid if the target supports floating point instructions (and is not using soft float).
2010-05-21 00:43:17 +00:00
fmdrr-fmrrd.ll
…
fmscs.ll
Change ARM scheduling default to list-hybrid if the target supports floating point instructions (and is not using soft float).
2010-05-21 00:43:17 +00:00
fmuls.ll
Change ARM scheduling default to list-hybrid if the target supports floating point instructions (and is not using soft float).
2010-05-21 00:43:17 +00:00
fnegs.ll
switch the flag for using NEON for SP floating point to a subtarget 'feature'.
2010-03-25 23:47:34 +00:00
fnmacs.ll
switch the flag for using NEON for SP floating point to a subtarget 'feature'.
2010-03-25 23:47:34 +00:00
fnmscs.ll
Change ARM scheduling default to list-hybrid if the target supports floating point instructions (and is not using soft float).
2010-05-21 00:43:17 +00:00
fnmul.ll
Use Unified Assembly Syntax for the ARM backend.
2009-11-09 00:11:35 +00:00
fnmuls.ll
…
formal.ll
…
fp16.ll
Fix typo
2010-03-14 18:42:52 +00:00
fp_convert.ll
switch the flag for using NEON for SP floating point to a subtarget 'feature'.
2010-03-25 23:47:34 +00:00
fp.ll
Use Unified Assembly Syntax for the ARM backend.
2009-11-09 00:11:35 +00:00
fparith.ll
Use Unified Assembly Syntax for the ARM backend.
2009-11-09 00:11:35 +00:00
fpcmp_ueq.ll
…
fpcmp.ll
Use Unified Assembly Syntax for the ARM backend.
2009-11-09 00:11:35 +00:00
fpconsts.ll
move fconst[sd] to UAL. <rdar://7414913>
2009-11-23 21:08:25 +00:00
fpconv.ll
Use Unified Assembly Syntax for the ARM backend.
2009-11-09 00:11:35 +00:00
fpmem.ll
Use Unified Assembly Syntax for the ARM backend.
2009-11-09 00:11:35 +00:00
fpow.ll
…
fpowi.ll
Make this more likely to generate a libcall.
2010-01-01 03:26:51 +00:00
fptoint.ll
Fix for bad FileCheck converts in revision 89584.
2009-11-22 12:50:05 +00:00
fsubs.ll
switch the flag for using NEON for SP floating point to a subtarget 'feature'.
2010-03-25 23:47:34 +00:00
globals.ll
Start function numbering at 0.
2010-04-17 16:29:15 +00:00
hardfloat_neon.ll
…
hello.ll
Revert 89562. We're being sneakier than I was giving us credit for, and this
2009-11-21 23:34:09 +00:00
hidden-vis-2.ll
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hidden-vis-3.ll
Start function numbering at 0.
2010-04-17 16:29:15 +00:00
hidden-vis.ll
…
iabs.ll
convert to filecheck.
2010-02-08 23:47:34 +00:00
ifcvt1.ll
…
ifcvt2.ll
Fix a bug which prevented tail merging of return instructions in
2010-05-03 14:35:47 +00:00
ifcvt3.ll
…
ifcvt4.ll
…
ifcvt5.ll
Fix a bug which prevented tail merging of return instructions in
2010-05-03 14:35:47 +00:00
ifcvt6.ll
Stop using the old pre-UAL syntax for LDM/STM instruction suffixes.
2010-03-16 16:19:07 +00:00
ifcvt7.ll
Stop using the old pre-UAL syntax for LDM/STM instruction suffixes.
2010-03-16 16:19:07 +00:00
ifcvt8.ll
Stop using the old pre-UAL syntax for LDM/STM instruction suffixes.
2010-03-16 16:19:07 +00:00
ifcvt9.ll
…
illegal-vector-bitcast.ll
…
imm.ll
…
indirectbr.ll
fix AsmPrinter::GetBlockAddressSymbol to always return a unique
2010-03-14 17:53:23 +00:00
inlineasm2.ll
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inlineasm3.ll
Handle ARM inline asm "w" constraints with 64-bit ("d") registers.
2009-12-18 01:03:29 +00:00
inlineasm-imm-arm.ll
…
inlineasm.ll
llvm can't correctly support 'H', 'Q' and 'R' modifiers. Just mark it an error.
2010-05-27 22:08:38 +00:00
insn-sched1.ll
Revert 89562. We're being sneakier than I was giving us credit for, and this
2009-11-21 23:34:09 +00:00
ispositive.ll
Fix the rest of the ARM failures by converting them to FileCheck.
2009-10-27 06:16:45 +00:00
large-stack.ll
…
ldm.ll
Stop using the old pre-UAL syntax for LDM/STM instruction suffixes.
2010-03-16 16:19:07 +00:00
ldr_ext.ll
…
ldr_frame.ll
…
ldr_post.ll
…
ldr_pre.ll
…
ldr.ll
Fix the rest of the ARM failures by converting them to FileCheck.
2009-10-27 06:16:45 +00:00
ldrd.ll
Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrm
2010-03-17 17:52:21 +00:00
load.ll
…
long_shift.ll
Run codegen dce pass for all targets at all optimization levels. Previously it's
2010-02-06 09:07:11 +00:00
long-setcc.ll
…
long.ll
Fix the rest of the ARM failures by converting them to FileCheck.
2009-10-27 06:16:45 +00:00
lsr-code-insertion.ll
Reapply the new LoopStrengthReduction code, with compile time and
2010-02-12 10:34:29 +00:00
lsr-on-unrolled-loops.ll
Fix some latency computation bugs: if the use is not a machine opcode do not just return zero.
2010-05-28 23:26:21 +00:00
lsr-scale-addr-mode.ll
…
mem.ll
…
memcpy-inline.ll
…
memfunc.ll
…
mls.ll
Convert a few tests to FileCheck for PR5307.
2009-11-22 11:45:44 +00:00
movt-movw-global.ll
Materialize global addresses via movt/movw pair, this is always better
2009-11-24 00:44:37 +00:00
movt.ll
…
mul_const.ll
Some cheap DAG combine goodness for multiplication with a particular constant.
2010-05-15 18:16:59 +00:00
mul.ll
…
mulhi.ll
…
mvn.ll
…
neon_arith1.ll
…
neon_ld1.ll
Use Unified Assembly Syntax for the ARM backend.
2009-11-09 00:11:35 +00:00
neon_ld2.ll
Use Unified Assembly Syntax for the ARM backend.
2009-11-09 00:11:35 +00:00
neon_minmax.ll
Check for comparisons of +/- zero when optimizing less-than-or-equal and
2010-02-24 22:15:53 +00:00
pack.ll
…
pr3502.ll
…
private.ll
Delete useless trailing semicolons.
2010-01-05 17:55:26 +00:00
reg_sequence.ll
Fix some latency computation bugs: if the use is not a machine opcode do not just return zero.
2010-05-28 23:26:21 +00:00
remat.ll
Delete dead PHI machine instructions. These can be created due to type
2010-02-10 22:58:57 +00:00
ret0.ll
…
ret_arg1.ll
…
ret_arg2.ll
…
ret_arg3.ll
…
ret_arg4.ll
…
ret_arg5.ll
…
ret_f32_arg2.ll
…
ret_f32_arg5.ll
…
ret_f64_arg2.ll
…
ret_f64_arg_reg_split.ll
…
ret_f64_arg_split.ll
…
ret_f64_arg_stack.ll
…
ret_i64_arg2.ll
…
ret_i64_arg3.ll
…
ret_i64_arg_split.ll
…
ret_i128_arg2.ll
…
ret_void.ll
…
rev.ll
…
sbfx.ll
add a simple dag combine to replace trivial shl+lshr with
2010-04-15 05:28:43 +00:00
section.ll
…
select_xform.ll
…
select-imm.ll
Fix codegen of conditional move of immediates. We were not making use of the immediate forms of cmov instructions at all.
2009-11-20 00:54:03 +00:00
select.ll
Use Unified Assembly Syntax for the ARM backend.
2009-11-09 00:11:35 +00:00
shifter_operand.ll
…
smul.ll
…
spill-q.ll
Recognize more BUILD_VECTORs and VECTOR_SHUFFLEs that can be implemented by
2010-05-22 00:23:12 +00:00
stack-frame.ll
…
stm.ll
…
str_post.ll
Fix the rest of the ARM failures by converting them to FileCheck.
2009-10-27 06:16:45 +00:00
str_pre-2.ll
Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrm
2010-03-17 17:52:21 +00:00
str_pre.ll
…
str_trunc.ll
…
sxt_rot.ll
…
t2-imm.ll
…
tail-opts.ll
Delete useless trailing semicolons.
2010-01-05 17:55:26 +00:00
thread_pointer.ll
…
tls1.ll
…
tls2.ll
Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrm
2010-03-17 17:52:21 +00:00
tls3.ll
…
trap.ll
Select @llvm.trap to the special B with 1111 condition (i.e. trap) instruction.
2010-05-11 07:26:32 +00:00
trunc_ldr.ll
…
truncstore-dag-combine.ll
…
tst_teq.ll
…
uint64tof64.ll
…
unaligned_load_store.ll
Fix a gross typo: ARMv6+ may or may not support unaligned memory operations.
2010-01-30 14:08:12 +00:00
unord.ll
…
uxt_rot.ll
…
uxtb.ll
…
vaba.ll
…
vabd.ll
…
vabs.ll
…
vadd.ll
Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul,
2010-05-03 22:36:46 +00:00
vargs_align.ll
…
vargs.ll
…
vbits.ll
The Neon "vtst" instruction takes a suffix that is the element size alone --
2010-01-17 06:35:17 +00:00
vbsl.ll
…
vceq.ll
…
vcge.ll
…
vcgt.ll
Intrinsics which do a vector compare (results are all zero or all ones) are modeled as icmp / fcmp + sext. This is turned into a vsetcc by dag combine (yes, not a good long term solution). The targets can then isel the vsetcc to the appropriate instruction.
2010-05-19 01:08:17 +00:00
vcnt.ll
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vcombine.ll
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vcvt.ll
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vdup.ll
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vext.ll
…
vfcmp.ll
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vfp.ll
Use Unified Assembly Syntax for the ARM backend.
2009-11-09 00:11:35 +00:00
vget_lane.ll
Use Unified Assembly Syntax for the ARM backend.
2009-11-09 00:11:35 +00:00
vhadd.ll
…
vhsub.ll
…
vicmp.ll
…
vld1.ll
Fix tests for Neon load/store intrinsics to match the i8* types expected by
2010-04-20 00:17:16 +00:00
vld2.ll
Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul,
2010-05-03 22:36:46 +00:00
vld3.ll
Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul,
2010-05-03 22:36:46 +00:00
vld4.ll
Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul,
2010-05-03 22:36:46 +00:00
vldlane.ll
Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul,
2010-05-03 22:36:46 +00:00
vminmax.ll
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vmla.ll
Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul,
2010-05-03 22:36:46 +00:00
vmls.ll
Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul,
2010-05-03 22:36:46 +00:00
vmov.ll
Print VMOV (immediate) operands as hexadecimal values. Apple's assembler
2009-11-06 23:33:28 +00:00
vmul.ll
Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul,
2010-05-03 22:36:46 +00:00
vneg.ll
Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul,
2010-05-03 22:36:46 +00:00
vpadal.ll
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vpadd.ll
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vpminmax.ll
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vqadd.ll
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vqdmul.ll
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vqshl.ll
…
vqshrn.ll
…
vqsub.ll
…
vrec.ll
…
vrev.ll
…
vshift.ll
…
vshiftins.ll
…
vshl.ll
…
vshll.ll
…
vshrn.ll
…
vsra.ll
…
vst1.ll
Fix tests for Neon load/store intrinsics to match the i8* types expected by
2010-04-20 00:17:16 +00:00
vst2.ll
Fix tests for Neon load/store intrinsics to match the i8* types expected by
2010-04-20 00:17:16 +00:00
vst3.ll
Fix tests for Neon load/store intrinsics to match the i8* types expected by
2010-04-20 00:17:16 +00:00
vst4.ll
Fix tests for Neon load/store intrinsics to match the i8* types expected by
2010-04-20 00:17:16 +00:00
vstlane.ll
Fix tests for Neon load/store intrinsics to match the i8* types expected by
2010-04-20 00:17:16 +00:00
vsub.ll
Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul,
2010-05-03 22:36:46 +00:00
vtbl.ll
…
vtrn.ll
Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul,
2010-05-03 22:36:46 +00:00
vuzp.ll
Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul,
2010-05-03 22:36:46 +00:00
vzip.ll
Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul,
2010-05-03 22:36:46 +00:00
weak2.ll
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weak.ll
…