6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-07-21 18:29:45 +00:00
Code Issues Projects Releases Wiki Activity
549b6dbbb7
llvm-6502/lib/Target/R600
History
Matt Arsenault 549b6dbbb7 R600/SI: Remove redundant setting expand on f64 vectors 
None of these are legal types already, so they default to
Expand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225728 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-12 23:13:00 +00:00
..
AsmParser R600/SI: Add a stub GCNTargetMachine 2015-01-06 18:00:21 +00:00
InstPrinter R600/SI: Fix f64 inline immediates 2014-12-17 21:04:08 +00:00
MCTargetDesc R600/SI: Use RegisterOperands to specify which operands can accept immediates 2015-01-12 19:33:18 +00:00
TargetInfo R600/SI: Add a stub GCNTargetMachine 2015-01-06 18:00:21 +00:00
AMDGPU.h R600/SI: Add a stub GCNTargetMachine 2015-01-06 18:00:21 +00:00
AMDGPU.td R600/SI: Add VI instructions 2014-12-07 12:18:57 +00:00
AMDGPUAlwaysInlinePass.cpp Reapply: R600: Make sure to inline all internal functions 2014-11-03 19:49:05 +00:00
AMDGPUAsmPrinter.cpp R600/SI: Remove VReg_32 register class 2015-01-07 20:59:25 +00:00
AMDGPUAsmPrinter.h R600/SI: Emit amd_kernel_code_t header for AMDGPU environment 2014-12-02 22:00:07 +00:00
AMDGPUCallingConv.td Remove the target machine from CCState. Previously it was only used 2014-08-06 18:45:26 +00:00
AMDGPUFrameLowering.cpp
AMDGPUFrameLowering.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
AMDGPUInstrInfo.cpp R600/SI: Add VI instructions 2014-12-07 12:18:57 +00:00
AMDGPUInstrInfo.h R600: Remove dead code 2014-10-07 21:29:56 +00:00
AMDGPUInstrInfo.td R600/SI: Add class intrinsic 2015-01-06 23:00:37 +00:00
AMDGPUInstructions.td R600/SI: Make more unordered comparisons legal 2014-12-11 22:15:39 +00:00
AMDGPUIntrinsicInfo.cpp
AMDGPUIntrinsicInfo.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
AMDGPUIntrinsics.td
AMDGPUISelDAGToDAG.cpp R600/SI: Use RegisterOperands to specify which operands can accept immediates 2015-01-12 19:33:18 +00:00
AMDGPUISelLowering.cpp [SelectionDAG] Allow targets to specify legality of extloads' result 2015-01-08 00:51:32 +00:00
AMDGPUISelLowering.h R600/SI: Add class intrinsic 2015-01-06 23:00:37 +00:00
AMDGPUMachineFunction.cpp R600/SI: Add preliminary support for flat address space 2014-09-15 15:41:53 +00:00
AMDGPUMachineFunction.h Reapply "R600: Add new intrinsic to read work dimensions" 2014-10-14 20:05:26 +00:00
AMDGPUMCInstLower.cpp R600/SI: Fix f64 inline immediates 2014-12-17 21:04:08 +00:00
AMDGPUMCInstLower.h R600/SI: Add VI instructions 2014-12-07 12:18:57 +00:00
AMDGPUPromoteAlloca.cpp R600: Don't promote allocas when one of the users is a ptrtoint instruction 2014-10-31 20:52:04 +00:00
AMDGPURegisterInfo.cpp R600/SI: Enable inline assembly 2014-12-03 04:08:00 +00:00
AMDGPURegisterInfo.h Add override to overriden virtual methods, remove virtual keywords. 2014-09-03 11:41:21 +00:00
AMDGPURegisterInfo.td
AMDGPUSubtarget.cpp R600/SI: Emit amd_kernel_code_t header for AMDGPU environment 2014-12-02 22:00:07 +00:00
AMDGPUSubtarget.h R600/SI: Add VI instructions 2014-12-07 12:18:57 +00:00
AMDGPUTargetMachine.cpp R600/SI: Add a stub GCNTargetMachine 2015-01-06 18:00:21 +00:00
AMDGPUTargetMachine.h R600/SI: Add a stub GCNTargetMachine 2015-01-06 18:00:21 +00:00
AMDGPUTargetTransformInfo.cpp Fix broken doxygen annotations, NFC 2014-11-12 18:25:06 +00:00
AMDILCFGStructurizer.cpp Fix typos: 2014-08-11 18:04:46 +00:00
AMDKernelCodeT.h R600/SI: Emit amd_kernel_code_t header for AMDGPU environment 2014-12-02 22:00:07 +00:00
CaymanInstructions.td
CIInstructions.td R600/SI: Add VI instructions 2014-12-07 12:18:57 +00:00
CMakeLists.txt R600/SI: Add SIFoldOperands pass 2014-11-21 22:06:37 +00:00
EvergreenInstructions.td R600/SI: Use REG_SEQUENCE instead of INSERT_SUBREGs 2014-11-02 23:46:54 +00:00
LLVMBuild.txt R600/SI: Start implementing an assembler 2014-11-14 14:08:00 +00:00
Makefile R600/SI: Start implementing an assembler 2014-11-14 14:08:00 +00:00
Processors.td R600/SI: Add VI instructions 2014-12-07 12:18:57 +00:00
R600ClauseMergePass.cpp Have MachineFunction cache a pointer to the subtarget to make lookups 2014-08-05 02:39:49 +00:00
R600ControlFlowFinalizer.cpp Remove unnecessary copying or replace it with moves in a bunch of places. 2014-10-04 16:55:56 +00:00
R600Defines.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
R600EmitClauseMarkers.cpp Have MachineFunction cache a pointer to the subtarget to make lookups 2014-08-05 02:39:49 +00:00
R600ExpandSpecialInstrs.cpp Have MachineFunction cache a pointer to the subtarget to make lookups 2014-08-05 02:39:49 +00:00
R600InstrFormats.td R600/SI: Start implementing an assembler 2014-11-14 14:08:00 +00:00
R600InstrInfo.cpp Remove unused argument to CreateTargetScheduleState and change 2014-10-09 01:59:35 +00:00
R600InstrInfo.h Remove unused argument to CreateTargetScheduleState and change 2014-10-09 01:59:35 +00:00
R600Instructions.td R600/SI: Use unordered not equal instructions 2014-12-11 22:15:35 +00:00
R600Intrinsics.td
R600ISelLowering.cpp [SelectionDAG] Allow targets to specify legality of extloads' result 2015-01-08 00:51:32 +00:00
R600ISelLowering.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
R600MachineFunctionInfo.cpp
R600MachineFunctionInfo.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
R600MachineScheduler.cpp Fix float division-by-zero in R600 scheduler. 2014-09-17 17:47:21 +00:00
R600MachineScheduler.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
R600OptimizeVectorRegisters.cpp Eliminate some deep std::vector copies. NFC. 2014-10-03 18:33:16 +00:00
R600Packetizer.cpp Cleanup: Delete seemingly unused reference to MachineDominatorTree from ScheduleDAGInstrs. 2014-08-20 20:57:26 +00:00
R600RegisterInfo.cpp
R600RegisterInfo.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
R600RegisterInfo.td
R600Schedule.td
R600TextureIntrinsicsReplacer.cpp
R700Instructions.td
SIAnnotateControlFlow.cpp
SIDefines.h R600/SI: Use RegisterOperands to specify which operands can accept immediates 2015-01-12 19:33:18 +00:00
SIFixSGPRCopies.cpp R600/SI: Remove VReg_32 register class 2015-01-07 20:59:25 +00:00
SIFixSGPRLiveRanges.cpp R600/SI: Fix the FixSGPRLiveRanges pass 2014-09-24 01:33:24 +00:00
SIFoldOperands.cpp R600/SI: Commute instructions to enable more folding opportunities 2015-01-07 22:44:19 +00:00
SIInsertWaits.cpp R600/SI: Insert s_waitcnt before s_barrier instructions. 2015-01-06 19:52:07 +00:00
SIInstrFormats.td R600/SI: Add VI instructions 2014-12-07 12:18:57 +00:00
SIInstrInfo.cpp R600/SI: Use RegisterOperands to specify which operands can accept immediates 2015-01-12 19:33:18 +00:00
SIInstrInfo.h R600/SI: Teach SIFoldOperands to split 64-bit constants when folding 2015-01-07 19:56:17 +00:00
SIInstrInfo.td R600/SI: Use RegisterOperands to specify which operands can accept immediates 2015-01-12 19:33:18 +00:00
SIInstructions.td R600/SI: Remove VReg_32 register class 2015-01-07 20:59:25 +00:00
SIIntrinsics.td
SIISelLowering.cpp R600/SI: Remove redundant setting expand on f64 vectors 2015-01-12 23:13:00 +00:00
SIISelLowering.h R600/SI: Remove SIISelLowering::legalizeOperands() 2015-01-08 15:08:17 +00:00
SILoadStoreOptimizer.cpp R600/SI: Fix live range error hidden by SIFoldOperands 2014-12-03 05:22:29 +00:00
SILowerControlFlow.cpp R600/SI: Remove VReg_32 register class 2015-01-07 20:59:25 +00:00
SILowerI1Copies.cpp R600/SI: Remove VReg_32 register class 2015-01-07 20:59:25 +00:00
SIMachineFunctionInfo.cpp R600/SI: Implement VGPR register spilling for compute at -O0 v3 2014-09-24 01:33:17 +00:00
SIMachineFunctionInfo.h R600/SI: Implement VGPR register spilling for compute at -O0 v3 2014-09-24 01:33:17 +00:00
SIRegisterInfo.cpp R600/SI: Use RegisterOperands to specify which operands can accept immediates 2015-01-12 19:33:18 +00:00
SIRegisterInfo.h R600/SI: Use RegisterOperands to specify which operands can accept immediates 2015-01-12 19:33:18 +00:00
SIRegisterInfo.td R600/SI: Use RegisterOperands to specify which operands can accept immediates 2015-01-12 19:33:18 +00:00
SISchedule.td
SIShrinkInstructions.cpp R600/SI: Move continue after checking s_mov_b32. 2014-12-08 19:55:43 +00:00
SITypeRewriter.cpp Revert "IR: MDNode => Value" 2014-11-11 21:30:22 +00:00
VIInstrFormats.td R600/SI: Add VI instructions 2014-12-07 12:18:57 +00:00
VIInstructions.td R600/SI: Remove VReg_32 register class 2015-01-07 20:59:25 +00:00