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62c1d00dfd
llvm-6502/lib/Target/XCore
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Duncan Sands 62c1d00dfd Speculatively disable Dan's commits 143177 and 143179 to see if 
it fixes the dragonegg self-host (it looks like gcc is miscompiled).
Original commit messages:
Eliminate LegalizeOps' LegalizedNodes map and have it just call RAUW
on every node as it legalizes them. This makes it easier to use
hasOneUse() heuristics, since unneeded nodes can be removed from the
DAG earlier.

Make LegalizeOps visit the DAG in an operands-last order. It previously
used operands-first, because LegalizeTypes has to go operands-first, and
LegalizeTypes used to be part of LegalizeOps, but they're now split.
The operands-last order is more natural for several legalization tasks.
For example, it allows lowering code for nodes with floating-point or
vector constants to see those constants directly instead of seeing the
lowered form (often constant-pool loads). This makes some things
somewhat more complicated today, though it ought to allow things to be
simpler in the future. It also fixes some bugs exposed by Legalizing
using RAUW aggressively.

Remove the part of LegalizeOps that attempted to patch up invalid chain
operands on libcalls generated by LegalizeTypes, since it doesn't work
with the new LegalizeOps traversal order. Instead, define what
LegalizeTypes is doing to be correct, and transfer the responsibility
of keeping calls from having overlapping calling sequences into the
scheduler.

Teach the scheduler to model callseq_begin/end pairs as having a
physical register definition/use to prevent calls from having
overlapping calling sequences. This is also somewhat complicated, though
there are ways it might be simplified in the future.

This addresses rdar://9816668, rdar://10043614, rdar://8434668, and others.
Please direct high-level questions about this patch to management.

Delete #if 0 code accidentally left in.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143188 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-28 09:55:57 +00:00
..
MCTargetDesc Move TargetRegistry and TargetSelect from Target to Support where they belong. 2011-08-24 18:08:43 +00:00
TargetInfo Move TargetRegistry and TargetSelect from Target to Support where they belong. 2011-08-24 18:08:43 +00:00
CMakeLists.txt Build system infrastructure for multiple tblgens. 2011-10-06 01:51:51 +00:00
Makefile Next round of MC refactoring. This patch factor MC table instantiations, MC 2011-07-14 20:59:42 +00:00
README.txt
XCore.h Next round of MC refactoring. This patch factor MC table instantiations, MC 2011-07-14 20:59:42 +00:00
XCore.td Replace TSFlagsFields and TSFlagsShifts with a simpler TSFlags field. 2010-04-05 03:10:20 +00:00
XCoreAsmPrinter.cpp Implement the emitFrameIndexDebugValue and getDebugValueLocation hooks. 2011-10-11 12:55:35 +00:00
XCoreCallingConv.td Add support for trampolines on the XCore. 2011-02-02 14:57:41 +00:00
XCoreFrameLowering.cpp Fix 80 column violations. 2011-09-23 16:28:10 +00:00
XCoreFrameLowering.h Move getInitialFrameState from TargetFrameInfo to MCAsmInfo (suggestions for 2011-07-18 22:29:13 +00:00
XCoreInstrFormats.td
XCoreInstrInfo.cpp Implement the emitFrameIndexDebugValue and getDebugValueLocation hooks. 2011-10-11 12:55:35 +00:00
XCoreInstrInfo.h Implement the emitFrameIndexDebugValue and getDebugValueLocation hooks. 2011-10-11 12:55:35 +00:00
XCoreInstrInfo.td Fix 80 column violations. 2011-09-23 16:28:10 +00:00
XCoreISelDAGToDAG.cpp Associate a MemOperand with LDWCP nodes introduced during ISel. 2011-09-12 14:43:23 +00:00
XCoreISelLowering.cpp Speculatively disable Dan's commits 143177 and 143179 to see if 2011-10-28 09:55:57 +00:00
XCoreISelLowering.h Split the init.trampoline intrinsic, which currently combines GCC's 2011-09-06 13:37:06 +00:00
XCoreMachineFunctionInfo.h
XCoreRegisterInfo.cpp Move getInitialFrameState from TargetFrameInfo to MCAsmInfo (suggestions for 2011-07-18 22:29:13 +00:00
XCoreRegisterInfo.h Sink getDwarfRegNum, getLLVMRegNum, getSEHRegNum from TargetRegisterInfo down 2011-07-18 20:57:22 +00:00
XCoreRegisterInfo.td Use set operations instead of plain lists to enumerate register classes. 2011-06-15 23:28:14 +00:00
XCoreSelectionDAGInfo.cpp Implement a bunch more TargetSelectionDAGInfo infrastructure. 2010-05-11 17:31:57 +00:00
XCoreSelectionDAGInfo.h Implement a bunch more TargetSelectionDAGInfo infrastructure. 2010-05-11 17:31:57 +00:00
XCoreSubtarget.cpp Move TargetRegistry and TargetSelect from Target to Support where they belong. 2011-08-24 18:08:43 +00:00
XCoreSubtarget.h Compute feature bits at time of MCSubtargetInfo initialization. 2011-07-07 07:07:08 +00:00
XCoreTargetMachine.cpp Move TargetRegistry and TargetSelect from Target to Support where they belong. 2011-08-24 18:08:43 +00:00
XCoreTargetMachine.h - Move CodeModel from a TargetMachine global option to MCCodeGenInfo. 2011-07-20 07:51:56 +00:00
XCoreTargetObjectFile.cpp Remove more duplicated code. 2011-01-23 04:43:11 +00:00
XCoreTargetObjectFile.h

README.txt 

To-do
-----

* Instruction encodings
* Tailcalls
* Investigate loop alignment
* Add builtins