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llvm-6502/test/CodeGen/X86
History
Chris Lattner 7556bfd6af unwind info not needed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74112 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-24 19:48:04 +00:00
..
2002-12-23-LocalRAProblem.ll
…
2002-12-23-SubProblem.ll
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2003-08-03-CallArgLiveRanges.ll
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2003-08-23-DeadBlockTest.ll
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2003-11-03-GlobalBool.ll
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2004-02-12-Memcpy.ll
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2004-02-13-FrameReturnAddress.ll
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2004-02-14-InefficientStackPointer.ll
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2004-02-22-Casts.ll
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2004-03-30-Select-Max.ll
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2004-04-09-SameValueCoalescing.ll
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2004-04-13-FPCMOV-Crash.ll
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2004-06-10-StackifierCrash.ll
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2004-10-08-SelectSetCCFold.ll
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2005-01-17-CycleInDAG.ll
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2005-02-14-IllegalAssembler.ll
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2005-05-08-FPStackifierPHI.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2006-01-19-ISelFoldingBug.ll
…
2006-03-01-InstrSchedBug.ll
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2006-03-02-InstrSchedBug.ll
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2006-04-04-CrossBlockCrash.ll
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2006-04-27-ISelFoldingBug.ll
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2006-05-01-SchedCausingSpills.ll
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2006-05-02-InstrSched1.ll
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2006-05-02-InstrSched2.ll
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2006-05-08-CoalesceSubRegClass.ll
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2006-05-08-InstrSched.ll
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2006-05-11-InstrSched.ll
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2006-05-17-VectorArg.ll
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2006-05-22-FPSetEQ.ll
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2006-05-25-CycleInDAG.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2006-07-10-InlineAsmAConstraint.ll
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2006-07-12-InlineAsmQConstraint.ll
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2006-07-19-ATTAsm.ll
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2006-07-20-InlineAsm.ll
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2006-07-28-AsmPrint-Long-As-Pointer.ll
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2006-07-31-SingleRegClass.ll
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2006-08-07-CycleInDAG.ll
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2006-08-16-CycleInDAG.ll
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2006-08-21-ExtraMovInst.ll
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2006-09-01-CycleInDAG.ll
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2006-10-02-BoolRetCrash.ll
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2006-10-07-ScalarSSEMiscompile.ll
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2006-10-09-CycleInDAG.ll
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2006-10-10-FindModifiedNodeSlotBug.ll
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2006-10-12-CycleInDAG.ll
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2006-10-13-CycleInDAG.ll
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2006-10-19-SwitchUnnecessaryBranching.ll
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2006-11-12-CSRetCC.ll
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2006-11-17-IllegalMove.ll
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2006-11-27-SelectLegalize.ll
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2006-11-28-Memcpy.ll
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2006-12-19-IntelSyntax.ll
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2007-01-08-InstrSched.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2007-01-13-StackPtrIndex.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2007-01-29-InlineAsm-ir.ll
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2007-02-04-OrAddrMode.ll
Change the x86 assembly output to use tab characters to separate the
2007-07-31 20:11:57 +00:00
2007-02-19-LiveIntervalAssert.ll
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2007-02-25-FastCCStack.ll
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2007-03-01-SpillerCrash.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2007-03-15-GEP-Idx-Sink.ll
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2007-03-16-InlineAsm.ll
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2007-03-18-LiveIntervalAssert.ll
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2007-03-24-InlineAsmMultiRegConstraint.ll
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2007-03-24-InlineAsmPModifier.ll
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2007-03-24-InlineAsmVectorOp.ll
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2007-03-24-InlineAsmXConstraint.ll
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2007-03-26-CoalescerBug.ll
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2007-04-08-InlineAsmCrash.ll
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2007-04-11-InlineAsmVectorResult.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2007-04-17-LiveIntervalAssert.ll
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2007-04-24-Huge-Stack.ll
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2007-04-24-VectorCrash.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2007-04-25-MMX-PADDQ.ll
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2007-04-27-InlineAsm-IntMemInput.ll
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2007-05-05-VecCastExpand.ll
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2007-05-07-InvokeSRet.ll
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2007-05-14-LiveIntervalAssert.ll
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2007-05-15-maskmovq.ll
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2007-05-17-ShuffleISelBug.ll
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2007-06-04-tailmerge4.ll
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2007-06-04-X86-64-CtorAsmBugs.ll
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2007-06-05-LSR-Dominator.ll
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2007-06-14-branchfold.ll
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2007-06-15-IntToMMX.ll
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2007-06-28-X86-64-isel.ll
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2007-06-29-DAGCombinerBug.ll
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2007-06-29-VecFPConstantCSEBug.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2007-07-03-GR64ToVR64.ll
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2007-07-10-StackerAssert.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2007-07-18-Vector-Extract.ll
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2007-08-01-LiveVariablesBug.ll
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2007-08-09-IllegalX86-64Asm.ll
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2007-08-10-SignExtSubreg.ll
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2007-08-13-AppendingLinkage.ll
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2007-08-13-SpillerReuse.ll
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2007-09-03-X86-64-EhSelector.ll
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2007-09-05-InvalidAsm.ll
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2007-09-06-ExtWeakAliasee.ll
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2007-09-17-ObjcFrameEH.ll
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2007-09-18-ShuffleXformBug.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2007-09-27-LDIntrinsics.ll
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2007-10-04-AvoidEFLAGSCopy.ll
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2007-10-05-3AddrConvert.ll
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2007-10-12-CoalesceExtSubReg.ll
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2007-10-12-SpillerUnfold1.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2007-10-12-SpillerUnfold2.ll
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2007-10-14-CoalescerCrash.ll
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2007-10-15-CoalescerCrash.ll
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2007-10-16-CoalescerCrash.ll
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2007-10-16-fp80_select.ll
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2007-10-16-IllegalAsm.ll
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2007-10-17-IllegalAsm.ll
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2007-10-19-SpillerUnfold.ll
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2007-10-28-inlineasm-q-modifier.ll
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2007-10-29-ExtendSetCC.ll
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2007-10-30-LSRCrash.ll
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2007-10-31-extractelement-i64.ll
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2007-11-01-ISelCrash.ll
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2007-11-02-BadAsm.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2007-11-03-x86-64-q-constraint.ll
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2007-11-04-LiveIntervalCrash.ll
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2007-11-04-LiveVariablesBug.ll
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2007-11-04-rip-immediate-constant.ll
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2007-11-06-InstrSched.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2007-11-07-MulBy4.ll
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2007-11-14-Coalescer-Bug.ll
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2007-11-30-LoadFolding-Bug.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2007-11-30-TestLoadFolding.ll
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2007-12-11-FoldImpDefSpill.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2007-12-16-BURRSchedCrash.ll
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2007-12-18-LoadCSEBug.ll
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2008-01-08-IllegalCMP.ll
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2008-01-08-SchedulerCrash.ll
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2008-01-09-LongDoubleSin.ll
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2008-01-16-FPStackifierAssert.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2008-01-16-InvalidDAGCombineXform.ll
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2008-01-16-Trampoline.ll
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2008-01-25-EmptyFunction.ll
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2008-02-05-ISelCrash.ll
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2008-02-06-LoadFoldingBug.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2008-02-08-LoadFoldingBug.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2008-02-14-BitMiscompile.ll
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2008-02-18-TailMergingBug.ll
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2008-02-20-InlineAsmClobber.ll
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2008-02-22-LocalRegAllocBug.ll
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2008-02-22-ReMatBug.ll
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2008-02-25-InlineAsmBug.ll
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2008-02-25-X86-64-CoalescerBug.ll
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2008-02-26-AsmDirectMemOp.ll
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2008-02-27-DeadSlotElimBug.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2008-02-27-PEICrash.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2008-03-06-frem-fpstack.ll
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2008-03-07-APIntBug.ll
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2008-03-10-RegAllocInfLoop.ll
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2008-03-12-ThreadLocalAlias.ll
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2008-03-13-TwoAddrPassCrash.ll
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2008-03-14-SpillerCrash.ll
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2008-03-18-CoalescerBug.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2008-03-19-DAGCombinerBug.ll
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2008-03-23-DarwinAsmComments.ll
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2008-03-25-TwoAddrPassBug.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2008-03-31-SpillerFoldingBug.ll
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2008-04-02-unnamedEH.ll
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2008-04-08-CoalescerCrash.ll
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2008-04-09-BranchFolding.ll
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2008-04-15-LiveVariableBug.ll
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2008-04-16-CoalescerBug.ll
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2008-04-16-ReMatBug.ll
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2008-04-17-CoalescerBug.ll
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2008-04-24-MemCpyBug.ll
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2008-04-24-pblendw-fold-crash.ll
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2008-04-26-Asm-Optimize-Imm.ll
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2008-04-28-CoalescerBug.ll
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2008-04-28-CyclicSchedUnit.ll
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2008-05-01-InvalidOrdCompare.ll
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2008-05-09-PHIElimBug.ll
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2008-05-09-ShuffleLoweringBug.ll
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2008-05-12-tailmerge-5.ll
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2008-05-21-CoalescerBug.ll
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2008-05-22-FoldUnalignedLoad.ll
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2008-05-28-CoalescerBug.ll
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2008-05-28-LocalRegAllocBug.ll
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2008-06-04-MemCpyLoweringBug.ll
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2008-06-13-NotVolatileLoadStore.ll
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2008-06-13-VolatileLoadStore.ll
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2008-06-16-SubregsBug.ll
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2008-06-18-BadShuffle.ll
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2008-06-25-VecISelBug.ll
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2008-07-07-DanglingDeadInsts.ll
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2008-07-09-ELFSectionAttributes.ll
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2008-07-11-SHLBy1.ll
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2008-07-11-SpillerBug.ll
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2008-07-16-CoalescerCrash.ll
…
2008-07-19-movups-spills.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2008-07-22-CombinerCrash.ll
…
2008-07-23-VSetCC.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2008-08-05-SpillerBug.ll
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2008-08-06-RewriterBug.ll
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2008-08-17-UComiCodeGenBug.ll
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2008-08-19-SubAndFetch.ll
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2008-08-23-64Bit-maskmovq.ll
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2008-08-23-X86-64AsmBug.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2008-08-25-AsmRegTypeMismatch.ll
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2008-08-31-EH_RETURN32.ll
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2008-08-31-EH_RETURN64.ll
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2008-09-05-sinttofp-2xi32.ll
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2008-09-09-LinearScanBug.ll
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2008-09-11-CoalescerBug2.ll
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2008-09-11-CoalescerBug.ll
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2008-09-17-inline-asm-1.ll
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2008-09-18-inline-asm-2.ll
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2008-09-19-RegAllocBug.ll
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2008-09-25-sseregparm-1.ll
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2008-09-26-FrameAddrBug.ll
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2008-09-29-ReMatBug.ll
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2008-09-29-VolatileBug.ll
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2008-10-02-Atomics32-2.ll
Help DejaGnu avoid pipe-jam by producing less output from certain test cases.
2009-05-16 00:34:42 +00:00
2008-10-06-MMXISelBug.ll
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2008-10-06-x87ld-nan-1.ll
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2008-10-06-x87ld-nan-2.ll
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2008-10-07-SSEISelBug.ll
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2008-10-11-CallCrash.ll
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2008-10-13-CoalescerBug.ll
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2008-10-16-SpillerBug.ll
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2008-10-16-VecUnaryOp.ll
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2008-10-17-Asm64bitRConstraint.ll
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2008-10-20-AsmDoubleInI32.ll
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2008-10-24-FlippedCompare.ll
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2008-10-27-CoalescerBug.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2008-10-27-StackRealignment.ll
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2008-10-29-ExpandVAARG.ll
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2008-11-03-F80VAARG.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2008-11-06-testb.ll
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2008-11-13-inlineasm-3.ll
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2008-11-29-DivideConstant16bit.ll
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2008-11-29-DivideConstant16bitSigned.ll
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2008-11-29-ULT-Sign.ll
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2008-12-01-loop-iv-used-outside-loop.ll
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2008-12-01-SpillerAssert.ll
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2008-12-02-dagcombine-1.ll
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2008-12-02-dagcombine-2.ll
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2008-12-02-dagcombine-3.ll
…
2008-12-02-IllegalResultType.ll
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2008-12-05-SpillerCrash.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2008-12-16-BadShift.ll
…
2008-12-16-dagcombine-4.ll
…
2008-12-19-EarlyClobberBug.ll
…
2008-12-22-dagcombine-5.ll
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2008-12-23-crazy-address.ll
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2008-12-23-dagcombine-6.ll
…
2009-01-12-CoalescerBug.ll
…
2009-01-13-DoubleUpdate.ll
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2009-01-16-SchedulerBug.ll
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2009-01-16-UIntToFP.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2009-01-18-ConstantExprCrash.ll
…
2009-01-25-NoSSE.ll
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2009-01-26-WrongCheck.ll
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2009-01-27-NullStrings.ll
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2009-01-29-LocalRegAllocBug.ll
…
2009-01-31-BigShift2.ll
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2009-01-31-BigShift3.ll
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2009-01-31-BigShift.ll
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2009-02-01-LargeMask.ll
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2009-02-03-AnalyzedTwice.ll
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2009-02-04-sext-i64-gep.ll
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2009-02-05-CoalescerBug.ll
…
2009-02-07-CoalescerBug.ll
…
2009-02-08-CoalescerBug.ll
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2009-02-11-codegenprepare-reuse.ll
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2009-02-12-DebugInfoVLA.ll
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2009-02-12-InlineAsm-nieZ-constraints.ll
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2009-02-12-SpillerBug.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2009-02-20-PreAllocSplit-Crash.ll
…
2009-02-21-ExtWeakInitializer.ll
…
2009-02-25-CommuteBug.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2009-02-26-MachineLICMBug.ll
…
2009-03-03-BitcastLongDouble.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2009-03-03-BTHang.ll
…
2009-03-05-burr-list-crash.ll
…
2009-03-07-FPConstSelect.ll
…
2009-03-09-APIntCrash.ll
…
2009-03-09-SpillerBug.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2009-03-10-CoalescerBug.ll
…
2009-03-11-CoalescerBug.ll
…
2009-03-12-CPAlignBug.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2009-03-13-PHIElimBug.ll
…
2009-03-16-PHIElimInLPad.ll
…
2009-03-16-SpillerBug.ll
THis doesn't fail.
2009-05-07 01:41:42 +00:00
2009-03-23-i80-fp80.ll
…
2009-03-23-LinearScanBug.ll
…
2009-03-23-MultiUseSched.ll
For Darwin / x86_64, override -relocation-model=static to pic if the output is assembly since Darwin assembler does not really support -static codeine.
2009-06-03 21:13:54 +00:00
2009-03-25-TestBug.ll
…
2009-03-26-NoImplicitFPBug.ll
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2009-04-09-InlineAsmCrash.ll
…
2009-04-12-FastIselOverflowCrash.ll
…
2009-04-12-picrel.ll
…
2009-04-13-2AddrAssert-2.ll
…
2009-04-13-2AddrAssert.ll
…
2009-04-14-IllegalRegs.ll
…
2009-04-16-SpillerUnfold.ll
…
2009-04-17-tls-fast.ll
…
2009-04-20-LinearScanOpt.ll
…
2009-04-21-NoReloadImpDef.ll
…
2009-04-24.ll
…
2009-04-25-CoalescerBug.ll
…
2009-04-27-CoalescerAssert.ll
…
2009-04-27-LiveIntervalsAssert2.ll
…
2009-04-27-LiveIntervalsAssert.ll
…
2009-04-27-LiveIntervalsBug.ll
…
2009-04-29-IndirectDestOperands.ll
…
2009-04-29-InlineAsmPMemoryModifier.ll
…
2009-04-29-LinearScanBug.ll
…
2009-04-29-RegAllocAssert.ll
…
2009-04-scale.ll
…
2009-05-08-InlineAsmIOffset.ll
Fix PR4152: asm constraint validation happens before dag combine, so we
2009-05-08 18:23:14 +00:00
2009-05-11-tailmerge-crash.ll
Fix PR4188. TailMerging can't tolerate inexact
2009-05-11 21:54:13 +00:00
2009-05-19-SingleElementExtractElement.ll
Add a testcase which got fixed by recent legalization work.
2009-05-28 05:10:20 +00:00
2009-05-23-available_externally.ll
available_externall linkage is not local, this was confusing the codegenerator,
2009-05-23 14:06:57 +00:00
2009-05-23-dagcombine-shifts.ll
Fix PR4254.
2009-05-23 17:29:48 +00:00
2009-05-28-DAGCombineCrash.ll
Do not try to create a MVT type of width 0.
2009-05-28 23:52:18 +00:00
2009-05-30-ISelBug.ll
(i64 (zext (srl GR32 8))) -> movzbl AH is not safe since srl 8 only clear the top 8 bits.
2009-05-30 08:43:27 +00:00
2009-06-02-RewriterBug.ll
Fix for PR4225: When rewriter reuse a value in a physical register , it clear the register kill operand marker and its kill ops information. However, the cleared operand may be a def of a super-register. Clear the kill ops info for the super-register's sub-registers as well.
2009-06-03 09:00:27 +00:00
2009-06-03-Win64DisableRedZone.ll
PR3739, part 1: Disable the red zone on Win64.
2009-06-04 02:02:01 +00:00
2009-06-03-Win64SpillXMM.ll
PR3739, part 2: Use an explicit store to spill XMM registers. (Previously,
2009-06-04 02:32:04 +00:00
2009-06-04-VirtualLiveIn.ll
RALinScan::attemptTrivialCoalescing() was returning a virtual register instead of the physical register it is allocated to. This resulted in virtual register(s) being added the live-in sets.
2009-06-04 20:53:36 +00:00
2009-06-05-ScalarToVectorByteMMX.ll
Get rid of a bogus pattern that interferes with optimization.
2009-06-06 04:17:04 +00:00
2009-06-05-sitofpCrash.ll
PR2598: make sure to expand illegal forms of integer/floating-point
2009-06-06 03:57:58 +00:00
2009-06-05-VariableIndexInsert.ll
Avoid crashing on a variable-index insertelement with element type i16.
2009-06-06 06:32:50 +00:00
2009-06-05-VZextByteShort.ll
Get rid of some bogus patterns for X86vzmovl. Don't create VZEXT_MOVL
2009-06-06 06:05:10 +00:00
2009-06-06-ConcatVectors.ll
Fix the expansion for CONCAT_VECTORS so that it doesn't create illegal
2009-06-06 07:08:26 +00:00
2009-06-07-ExpandMMXBitcast.ll
Fix the run-line for this test to work correctly outside of x86.
2009-06-07 09:44:19 +00:00
2009-06-12-x86_64-tail-call-conv-out-of-sync-bug.ll
Fix Bug 4278: X86-64 with -tailcallopt calling convention
2009-06-12 16:26:57 +00:00
2009-06-15-not-a-tail-call.ll
CheckTailCallReturnConstraints is missing a check on the
2009-06-15 14:43:36 +00:00
2009-06-18-movlp-shuffle-register.ll
Fix for PR2484: add an SSE1 pattern for a shuffle we normally prefer to
2009-06-19 07:00:55 +00:00
20081212.ll
…
20090313-signext.ll
…
abi-isel.ll
For Darwin / x86_64, override -relocation-model=static to pic if the output is assembly since Darwin assembler does not really support -static codeine.
2009-06-03 21:13:54 +00:00
add-trick32.ll
…
add-trick64.ll
…
add-with-overflow.ll
…
aliases.ll
…
aligned-comm.ll
…
all-ones-vector.ll
…
alloca-align-rounding.ll
…
and-or-fold.ll
…
and-su.ll
…
anyext-uses.ll
…
arg-cast.ll
…
asm-block-labels.ll
…
asm-global-imm.ll
…
asm-indirect-mem.ll
…
atomic_op.ll
…
Atomics-32.ll
Help DejaGnu avoid pipe-jam by producing less output from certain test cases.
2009-05-16 00:34:42 +00:00
Atomics-64.ll
Help DejaGnu avoid pipe-jam by producing less output from certain test cases.
2009-05-16 00:34:42 +00:00
avoid-loop-align-2.ll
If header of inner loop is aligned, do not align the outer loop header. We don't want to add nops in the outer loop for the sake of aligning the inner loop.
2009-05-12 23:58:14 +00:00
avoid-loop-align.ll
…
bitcast2.ll
…
bitcast-int-to-vector.ll
…
bitcast.ll
…
break-anti-dependencies.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
bswap-inline-asm.ll
…
bswap.ll
…
bt.ll
…
byval2.ll
…
byval3.ll
…
byval4.ll
…
byval5.ll
…
byval6.ll
…
byval7.ll
…
byval.ll
…
call-imm.ll
Fix test on non-darwin hosts.
2009-05-20 05:45:36 +00:00
call-push.ll
…
change-compare-stride-0.ll
…
change-compare-stride-1.ll
…
clz.ll
…
cmp0.ll
…
cmp1.ll
…
cmp2.ll
…
cmp-test.ll
…
coalescer-commute1.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
coalescer-commute2.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
coalescer-commute3.ll
…
coalescer-commute4.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
coalescer-commute5.ll
…
coalescer-remat.ll
…
code_placement.ll
Enable loop bb placement optimization.
2009-05-08 23:35:49 +00:00
codegen-prepare-cast.ll
Fix CodeGenPrepare's address-mode sinking to handle unusual
2009-06-02 21:29:13 +00:00
combine-lds.ll
…
commute-cmov.ll
…
commute-intrinsic.ll
…
commute-two-addr.ll
…
compare_folding.ll
…
compare-add.ll
…
complex-fca.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
const-select.ll
…
constant-pool-remat-0.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
convert-2-addr-3-addr-inc64.ll
…
copysign-zero.ll
…
critical-edge-split.ll
…
cstring.ll
…
dag-rauw-cse.ll
…
dagcombine-buildvector.ll
Adapt the x86 build_vector dagcombine to the current state of the legalizer.
2009-06-05 21:37:30 +00:00
dagcombine-cse.ll
…
darwin-bzero.ll
…
darwin-no-dead-strip.ll
…
darwin-stub.ll
…
dg.exp
…
div_const.ll
…
divrem.ll
…
dollar-name.ll
…
dyn-stackalloc.ll
…
epilogue.ll
…
extend.ll
…
extern_weak.ll
…
extmul64.ll
…
extmul128.ll
…
extract-combine.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
extractelement-from-arg.ll
…
extractelement-load.ll
…
extractelement-shuffle.ll
…
extractps.ll
…
fabs.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
fast-cc-callee-pops.ll
…
fast-cc-merge-stack-adj.ll
…
fast-cc-pass-in-regs.ll
…
fast-isel-bail.ll
…
fast-isel-call.ll
…
fast-isel-gep-sext.ll
…
fast-isel-i1.ll
…
fast-isel-mem.ll
…
fast-isel-phys.ll
…
fast-isel-shift-imm.ll
…
fast-isel-tailcall.ll
…
fast-isel-tls.ll
…
fast-isel-trunc.ll
…
fast-isel.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
fastcall-correct-mangling.ll
…
fastcc-2.ll
…
fastcc-byval.ll
…
fastcc-sret.ll
…
fastcc.ll
…
field-extract-use-trunc.ll
…
fildll.ll
…
fmul-zero.ll
Update this test to use fmul instead of mul.
2009-06-15 22:49:34 +00:00
fold-add.ll
Enhance address-mode folding of ISD::ADD to handle cases where the
2009-03-13 02:25:09 +00:00
fold-and-shift.ll
…
fold-call-2.ll
…
fold-call-3.ll
…
fold-call.ll
…
fold-imm.ll
…
fold-load.ll
…
fold-mul-lohi.ll
Add nounwind to this test.
2009-05-13 22:29:12 +00:00
fold-pcmpeqd-0.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
fold-pcmpeqd-1.ll
…
fold-pcmpeqd-2.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
fold-sext-trunc.ll
…
fp2sint.ll
…
fp_constant_op.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
fp_load_cast_fold.ll
…
fp_load_fold.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
fp-immediate-shorten.ll
…
fp-in-intregs.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
fp-stack-2results.ll
…
fp-stack-compare.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
fp-stack-direct-ret.ll
…
fp-stack-ret-conv.ll
…
fp-stack-ret-store.ll
…
fp-stack-ret.ll
…
fp-stack-retcopy.ll
…
fp-stack-set-st1.ll
…
fsxor-alignment.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
full-lsr.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
ga-offset.ll
For Darwin / x86_64, override -relocation-model=static to pic if the output is assembly since Darwin assembler does not really support -static codeine.
2009-06-03 21:13:54 +00:00
h-register-addressing-32.ll
…
h-register-addressing-64.ll
…
h-register-store.ll
…
h-registers-0.ll
…
h-registers-1.ll
…
h-registers-2.ll
…
h-registers-3.ll
More h-registers tricks: folding zext nodes.
2009-05-29 01:44:43 +00:00
hidden-vis-2.ll
…
hidden-vis-3.ll
…
hidden-vis-4.ll
…
hidden-vis.ll
…
i2k.ll
…
i64-mem-copy.ll
…
i128-and-beyond.ll
…
i128-immediate.ll
…
i128-mul.ll
…
i128-ret.ll
…
i256-add.ll
…
iabs.ll
…
illegal-asm.ll
…
illegal-insert.ll
…
illegal-vector-args-return.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
imp-def-copies.ll
…
imul-lea-2.ll
…
imul-lea.ll
…
inline-asm-2addr.ll
…
inline-asm-flag-clobber.ll
…
inline-asm-fpstack2.ll
Fix PR4185.
2009-06-21 12:02:51 +00:00
inline-asm-fpstack.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
inline-asm-mrv.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
inline-asm-out-regs.ll
…
inline-asm-pic.ll
…
inline-asm-tied.ll
Fix support for inline asm input / output operand tying when operand spans across multiple registers (e.g. two i64 operands in 32-bit mode).
2009-06-24 02:05:51 +00:00
inline-asm-x-scalar.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
inline-asm.ll
…
ins_subreg_coalesce-1.ll
…
ins_subreg_coalesce-2.ll
…
ins_subreg_coalesce-3.ll
…
insertelement-copytoregs.ll
…
insertelement-legalize.ll
…
invalid-shift-immediate.ll
…
isel-sink2.ll
…
isel-sink3.ll
…
isel-sink.ll
…
isint.ll
…
isnan2.ll
…
isnan.ll
…
ispositive.ll
…
iv-users-in-other-loops.ll
Remove the code from IVUsers that attempted to handle
2009-06-18 16:54:06 +00:00
jump_sign.ll
…
ldzero.ll
…
lea-2.ll
…
lea-3.ll
…
lea-4.ll
…
lea-neg.ll
Make this grep line a little more specific so that it doesn't
2009-05-11 18:49:56 +00:00
lea-recursion.ll
…
lea.ll
…
legalizedag_vec.ll
…
lfence.ll
…
limited-prec.ll
…
live-out-reg-info.ll
…
local-liveness.ll
…
long-setcc.ll
…
longlong-deadload.ll
…
loop-hoist.ll
Add nounwind to a few tests.
2009-05-18 15:16:49 +00:00
loop-strength-reduce2.ll
…
loop-strength-reduce3.ll
…
loop-strength-reduce4.ll
…
loop-strength-reduce5.ll
…
loop-strength-reduce6.ll
…
loop-strength-reduce7.ll
…
loop-strength-reduce8.ll
…
loop-strength-reduce-2.ll
…
loop-strength-reduce-3.ll
…
loop-strength-reduce.ll
…
lsr-loop-exit-cond.ll
Teach LSR to optimize more loop exit compares, i.e. change them to use postinc iv value. Previously LSR would only optimize those which are in the loop latch block. However, if LSR can prove it is safe (and profitable), it's now possible to change those not in the latch blocks to use postinc values.
2009-05-11 22:33:01 +00:00
lsr-negative-stride.ll
Teach LSR to optimize more loop exit compares, i.e. change them to use postinc iv value. Previously LSR would only optimize those which are in the loop latch block. However, if LSR can prove it is safe (and profitable), it's now possible to change those not in the latch blocks to use postinc values.
2009-05-11 22:33:01 +00:00
lsr-sort.ll
…
masked-iv-safe.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
masked-iv-unsafe.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
maskmovdqu.ll
…
memcpy-2.ll
…
memcpy.ll
…
memmove-0.ll
…
memmove-1.ll
…
memmove-2.ll
…
memmove-3.ll
…
memmove-4.ll
…
memset64-on-x86-32.ll
…
memset-2.ll
…
memset.ll
…
mfence.ll
…
mingw-alloca.ll
…
mmx-arg-passing2.ll
…
mmx-arg-passing.ll
…
mmx-arith.ll
…
mmx-bitcast-to-i64.ll
…
mmx-copy-gprs.ll
…
mmx-emms.ll
…
mmx-insert-element.ll
…
mmx-pinsrw.ll
…
mmx-punpckhdq.ll
…
mmx-s2v.ll
…
mmx-shift.ll
…
mmx-shuffle.ll
…
mmx-vzmovl-2.ll
…
mmx-vzmovl.ll
…
movfs.ll
Add basic support for code generation of
2009-05-05 18:52:19 +00:00
movgs.ll
…
mul64.ll
…
mul128.ll
…
mul-legalize.ll
…
mul-remat.ll
…
mul-shift-reassoc.ll
…
multiple-return-values-cross-block.ll
Handle getresult instructions in different basic blocks
2008-03-21 21:01:32 +00:00
multiple-return-values.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
nancvt.ll
…
narrow_op-1.ll
Added optimization that narrow load / op / store and the 'op' is a bit twiddling instruction and its second operand is an immediate. If bits that are touched by 'op' can be done with a narrower instruction, reduce the width of the load and store as well. This happens a lot with bitfield manipulation code.
2009-05-28 00:35:15 +00:00
narrow_op-2.ll
Added optimization that narrow load / op / store and the 'op' is a bit twiddling instruction and its second operand is an immediate. If bits that are touched by 'op' can be done with a narrower instruction, reduce the width of the load and store as well. This happens a lot with bitfield manipulation code.
2009-05-28 00:35:15 +00:00
neg_fp.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
negate-add-zero.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
negative_zero.ll
…
negative-sin.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
negative-subscript.ll
…
nobt.ll
…
nofence.ll
…
nosse-error1.ll
…
nosse-error2.ll
…
nosse-varargs.ll
Implement -mno-sse: if SSE is disabled on x86-64, don't store XMM on stack for
2009-02-01 18:15:56 +00:00
omit-label.ll
If a MachineBasicBlock has multiple ways of reaching another block,
2009-05-05 21:10:19 +00:00
opt-ext-uses.ll
…
optimize-max-0.ll
Re-apply r73718, now that the fix in r73787 is in, and add a
2009-06-19 23:23:27 +00:00
optimize-max-1.ll
Re-apply r73718, now that the fix in r73787 is in, and add a
2009-06-19 23:23:27 +00:00
optimize-max-2.ll
Re-apply r73718, now that the fix in r73787 is in, and add a
2009-06-19 23:23:27 +00:00
or-branch.ll
…
overlap-shift.ll
…
packed_struct.ll
…
peep-test-0.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
peep-test-1.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
peep-test-2.ll
…
peep-vector-extract-concat.ll
…
peep-vector-extract-insert.ll
…
phys_subreg_coalesce-2.ll
…
phys_subreg_coalesce.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
pic_jumptable.ll
On Darwin, ams printer should output a second label before a jump table so the linker knows it's a new atom. But this is only needed if the jump table is put in a separate section from the function body.
2009-06-18 20:37:15 +00:00
pic-1.ll
unwind info not needed.
2009-06-24 19:48:04 +00:00
pic-2.ll
…
pic-3.ll
…
pic-4.ll
…
pic-5.ll
…
pic-6.ll
…
pic-cpool.ll
…
pic-jtbl.ll
…
pic-load-remat.ll
…
pmul.ll
…
postalloc-coalescing.ll
…
pr1462.ll
…
pr1489.ll
…
pr1505.ll
…
pr1505b.ll
…
pr2177.ll
…
pr2182.ll
…
pr2326.ll
…
pr2623.ll
…
pr2656.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
pr2659.ll
…
pr2849.ll
…
pr2924.ll
…
pr2982.ll
…
pr3154.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
pr3216.ll
…
pr3241.ll
…
pr3243.ll
…
pr3244.ll
…
pr3250.ll
…
pr3317.ll
…
pr3366.ll
…
pr3457.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
pr3495-2.ll
…
pr3495.ll
Extend ScalarEvolution's multiple-exit support to compute exact
2009-06-24 01:18:18 +00:00
pr3522.ll
…
pre-split1.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
pre-split2.ll
…
pre-split3.ll
…
pre-split4.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
pre-split5.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
pre-split6.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
pre-split7.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
pre-split8.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
pre-split9.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
pre-split10.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
prefetch.ll
…
private-2.ll
Quotes should be printed before private prefix; some code clean up.
2009-05-05 22:50:29 +00:00
private.ll
…
rdtsc.ll
…
red-zone2.ll
Add new function attribute - noredzone.
2009-06-04 22:05:33 +00:00
red-zone.ll
…
regpressure.ll
…
rem-2.ll
…
rem.ll
…
remat-constant.ll
For Darwin / x86_64, override -relocation-model=static to pic if the output is assembly since Darwin assembler does not really support -static codeine.
2009-06-03 21:13:54 +00:00
remat-mov-1.ll
Teach LSR to optimize more loop exit compares, i.e. change them to use postinc iv value. Previously LSR would only optimize those which are in the loop latch block. However, if LSR can prove it is safe (and profitable), it's now possible to change those not in the latch blocks to use postinc values.
2009-05-11 22:33:01 +00:00
ret-addr.ll
…
ret-i64-0.ll
…
ret-mmx.ll
…
rip-rel-address.ll
…
rodata-relocs.ll
…
rot16.ll
…
rot32.ll
…
rot64.ll
…
rotate2.ll
…
rotate.ll
…
scalar_sse_minmax.ll
…
scalar-extract.ll
…
scalar-min-max-fill-operand.ll
…
scalarize-bitcast.ll
When scalarizing a vector BITCAST, check whether the operand has vector
2009-05-11 18:30:42 +00:00
select-no-cmov.ll
…
select-zero-one.ll
…
select.ll
…
setoeq.ll
…
setuge.ll
…
sext-load.ll
…
sext-ret-val.ll
…
sext-select.ll
…
sext-trunc.ll
…
sfence.ll
…
shift-and.ll
…
shift-coalesce.ll
…
shift-codegen.ll
…
shift-combine.ll
…
shift-double.ll
…
shift-folding.ll
…
shift-i128.ll
…
shift-i256.ll
…
shift-one.ll
…
shl_elim.ll
…
shrink-fp-const1.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
shrink-fp-const2.ll
…
sincos.ll
…
small-byval-memcpy.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
smul-with-overflow-2.ll
…
smul-with-overflow-3.ll
…
smul-with-overflow.ll
…
soft-fp.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
split-eh-lpad-edges.ll
…
split-select.ll
…
split-vector-rem.ll
…
sret.ll
…
sse41-extractps-bitcast-0.ll
…
sse41-extractps-bitcast-1.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
sse41-pmovx.ll
Fix an obvious typo.
2009-06-06 05:55:37 +00:00
sse_reload_fold.ll
…
sse-align-0.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
sse-align-1.ll
…
sse-align-2.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
sse-align-3.ll
…
sse-align-4.ll
…
sse-align-5.ll
…
sse-align-6.ll
…
sse-align-7.ll
…
sse-align-8.ll
…
sse-align-9.ll
…
sse-align-10.ll
…
sse-align-11.ll
…
sse-align-12.ll
…
sse-fcopysign.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
sse-load-ret.ll
…
sse-varargs.ll
…
stack-align.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
stack-color-with-reg-2.ll
Fixed a stack slot coloring with reg bug: do not update implicit use / def when doing forward / backward propagation.
2009-05-12 18:31:57 +00:00
stack-color-with-reg.ll
Fixed a stack slot coloring with reg bug: do not update implicit use / def when doing forward / backward propagation.
2009-05-12 18:31:57 +00:00
store_op_load_fold2.ll
…
store_op_load_fold.ll
…
store-fp-constant.ll
…
store-global-address.ll
…
storetrunc-fp.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
stride-nine-with-base-reg.ll
…
stride-reuse.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
sub-with-overflow.ll
…
subclass-coalesce.ll
…
subreg-to-reg-0.ll
…
subreg-to-reg-1.ll
…
subreg-to-reg-2.ll
…
subreg-to-reg-3.ll
…
subreg-to-reg-4.ll
…
subreg-to-reg-5.ll
Factor the code for collecting IV users out of LSR into an IVUsers class,
2009-05-12 02:17:14 +00:00
subreg-to-reg-6.ll
…
switch-zextload.ll
…
swizzle.ll
…
tailcall1.ll
…
tailcall-i1.ll
…
tailcall-stackalign.ll
…
tailcall-structret.ll
…
tailcall-void.ll
…
tailcallbyval64.ll
…
tailcallbyval.ll
…
tailcallfp2.ll
…
tailcallfp.ll
…
tailcallpic1.ll
…
tailcallpic2.ll
…
tailcallstack64.ll
Fix Bug 4278: X86-64 with -tailcallopt calling convention
2009-06-12 16:26:57 +00:00
test-nofold.ll
…
testl-commute.ll
…
tls1-pic.ll
change TLS_ADDR lowering to lower to a real mem operand, instead of matching as
2009-06-20 20:38:48 +00:00
tls1.ll
no need for unwind info here.
2009-06-20 19:43:09 +00:00
tls2-pic.ll
change TLS_ADDR lowering to lower to a real mem operand, instead of matching as
2009-06-20 20:38:48 +00:00
tls2.ll
…
tls3-pic.ll
change TLS_ADDR lowering to lower to a real mem operand, instead of matching as
2009-06-20 20:38:48 +00:00
tls3.ll
…
tls4-pic.ll
change TLS_ADDR lowering to lower to a real mem operand, instead of matching as
2009-06-20 20:38:48 +00:00
tls4.ll
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tls5.ll
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tls6.ll
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tls7.ll
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tls8.ll
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tls9.ll
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tls10.ll
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tls11.ll
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tls12.ll
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tls13.ll
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tls14.ll
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tls15.ll
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trap.ll
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trunc-to-bool.ll
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twoaddr-coalesce-2.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
twoaddr-coalesce.ll
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twoaddr-delete.ll
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twoaddr-pass-sink.ll
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twoaddr-remat.ll
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uint_to_fp-2.ll
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uint_to_fp.ll
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umul-with-carry.ll
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umul-with-overflow.ll
Add some generic expansion logic for SMULO and UMULO. Fixes UMULO
2009-06-16 06:58:29 +00:00
urem-i8-constant.ll
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v4f32-immediate.ll
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variable-sized-darwin-bzero.ll
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variadic-node-pic.ll
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vec_add.ll
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vec_align.ll
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vec_call.ll
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vec_clear.ll
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vec_ctbits.ll
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vec_extract-sse4.ll
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vec_extract.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
vec_fneg.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
vec_i64.ll
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vec_ins_extract-1.ll
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vec_ins_extract.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
vec_insert_4.ll
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vec_insert-2.ll
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vec_insert-3.ll
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vec_insert-5.ll
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vec_insert-6.ll
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vec_insert-7.ll
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vec_insert-8.ll
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vec_insert.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
vec_loadhl.ll
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vec_loadsingles.ll
Slightly generalize the code that handles shuffles of consecutive loads
2009-06-07 06:52:44 +00:00
vec_logical.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
vec_return.ll
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vec_select.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
vec_set-2.ll
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vec_set-3.ll
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vec_set-4.ll
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vec_set-5.ll
Slightly generalize the code that handles shuffles of consecutive loads
2009-06-07 06:52:44 +00:00
vec_set-6.ll
Slightly generalize the code that handles shuffles of consecutive loads
2009-06-07 06:52:44 +00:00
vec_set-7.ll
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vec_set-8.ll
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vec_set-9.ll
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vec_set-A.ll
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vec_set-B.ll
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vec_set-C.ll
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vec_set-D.ll
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vec_set-E.ll
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vec_set-F.ll
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vec_set-G.ll
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vec_set-H.ll
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vec_set-I.ll
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vec_set-J.ll
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vec_set.ll
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vec_shift2.ll
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vec_shift3.ll
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vec_shift.ll
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vec_shuffle-2.ll
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vec_shuffle-3.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
vec_shuffle-4.ll
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vec_shuffle-5.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
vec_shuffle-6.ll
Remove llvm-upgrade and update tests.
2008-02-21 07:42:26 +00:00
vec_shuffle-7.ll
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vec_shuffle-8.ll
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vec_shuffle-9.ll
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vec_shuffle-10.ll
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vec_shuffle-11.ll
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vec_shuffle-12.ll
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vec_shuffle-13.ll
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vec_shuffle-14.ll
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vec_shuffle-15.ll
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vec_shuffle-16.ll
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vec_shuffle-17.ll
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vec_shuffle-18.ll
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vec_shuffle-19.ll
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vec_shuffle-20.ll
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vec_shuffle-21.ll
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vec_shuffle-22.ll
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vec_shuffle-23.ll
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vec_shuffle-24.ll
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vec_shuffle-25.ll
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vec_shuffle-26.ll
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vec_shuffle-27.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
vec_shuffle-28.ll
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vec_shuffle-29.ll
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vec_shuffle-30.ll
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vec_shuffle-31.ll
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vec_shuffle-32.ll
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vec_shuffle-33.ll
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vec_shuffle-34.ll
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vec_shuffle-35.ll
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vec_shuffle-36.ll
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vec_shuffle-37.ll
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vec_shuffle.ll
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vec_splat-2.ll
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vec_splat-3.ll
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vec_splat-4.ll
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vec_splat.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
vec_ss_load_fold.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
vec_zero_cse.ll
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vec_zero-2.ll
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vec_zero.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
vector-intrinsics.ll
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vector-rem.ll
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vector-variable-idx.ll
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vector.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
vfcmp.ll
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volatile.ll
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vortex-bug.ll
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vshift_scalar.ll
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vshift_split2.ll
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vshift_split.ll
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vshift-1.ll
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vshift-2.ll
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vshift-3.ll
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vshift-4.ll
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weak.ll
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widen_arith-1.ll
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widen_arith-2.ll
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widen_arith-3.ll
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widen_arith-4.ll
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widen_arith-5.ll
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widen_arith-6.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
widen_cast-1.ll
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widen_cast-2.ll
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widen_cast-3.ll
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widen_cast-4.ll
Fix test to account for legalization changes; I think this ends up
2009-05-23 13:15:11 +00:00
widen_cast-5.ll
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widen_cast-6.ll
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widen_conv-1.ll
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widen_conv-2.ll
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widen_conv-3.ll
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widen_conv-4.ll
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widen_select-1.ll
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widen_shuffle-1.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
widen_shuffle-2.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
x86-64-and-mask.ll
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x86-64-arg.ll
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x86-64-asm.ll
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x86-64-dead-stack-adjust.ll
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x86-64-disp.ll
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x86-64-frameaddr.ll
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x86-64-gv-offset.ll
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x86-64-malloc.ll
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x86-64-mem.ll
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x86-64-pic-1.ll
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x86-64-pic-2.ll
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x86-64-pic-3.ll
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x86-64-pic-4.ll
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x86-64-pic-5.ll
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x86-64-pic-6.ll
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x86-64-pic-7.ll
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x86-64-pic-8.ll
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x86-64-pic-9.ll
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x86-64-pic-10.ll
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x86-64-pic-11.ll
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x86-64-ret0.ll
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x86-64-shortint.ll
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x86-64-sret-return.ll
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x86-64-varargs.ll
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x86-frameaddr2.ll
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x86-frameaddr.ll
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x86-store-gv-addr.ll
Revert r72734. The Darwin assembler doesn't support the static
2009-06-03 00:37:20 +00:00
xmm-r64.ll
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xor_not.ll
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xor-undef.ll
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xorl.ll
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zero-remat.ll
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zext-inreg-0.ll
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zext-inreg-1.ll
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