llvm-6502/lib/Target/Mips
Chad Rosier 096c0a0331 [Mips Disassembler] Have the DecodeCCRRegisterClass function use the getReg
function to lookup the proper tablegen'ed register enumeration.  Previously,
it was using the encoded value directly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185026 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-26 22:23:32 +00:00
..
AsmParser This patch introduces RegisterOperand class into Mips FPU instruction definitions and adds dedicated parser methods to MipsAsmParser. It is the first in a series of patches that should fix the problems with parsing Mips FPU instructions and optimize the code in MipsAsmParser. 2013-06-24 10:05:34 +00:00
Disassembler [Mips Disassembler] Have the DecodeCCRRegisterClass function use the getReg 2013-06-26 22:23:32 +00:00
InstPrinter This patch that sets the EmitAlias flag in td files 2013-02-05 08:32:10 +00:00
MCTargetDesc Mips ELF: Mark object file as ABI compliant 2013-06-18 19:47:15 +00:00
TargetInfo Move all of the header files which are involved in modelling the LLVM IR 2013-01-02 11:36:10 +00:00
CMakeLists.txt Fix CMakeLists. 2013-06-11 22:36:30 +00:00
LLVMBuild.txt Add disassembler to MIPS. 2012-04-17 18:03:21 +00:00
Makefile Remove edis - the enhanced disassembler. Fixes PR14654. 2012-12-19 19:55:47 +00:00
MicroMipsInstrFormats.td [mips] Add definitions of micromips load and store instructions. 2013-04-25 01:21:25 +00:00
MicroMipsInstrInfo.td Mips td file formatting: white space and long lines 2013-05-16 20:08:49 +00:00
Mips16FrameLowering.cpp Use pointers to the MCAsmInfo and MCRegInfo. 2013-06-18 07:20:20 +00:00
Mips16FrameLowering.h [mips] Add parameter Alignment to MipsFrameLowering's constructor. 2013-03-29 01:51:04 +00:00
Mips16HardFloat.cpp Patch number 2 for mips16/32 floating point interoperability stubs. 2013-05-16 02:17:42 +00:00
Mips16HardFloat.h Checkin in of first of several patches to finish implementation of 2013-05-10 22:25:39 +00:00
Mips16InstrFormats.td Mips td file formatting: white space and long lines 2013-05-16 20:08:49 +00:00
Mips16InstrInfo.cpp Don't cache the instruction and register info from the TargetMachine, because 2013-06-07 07:04:14 +00:00
Mips16InstrInfo.h [mips] Rename functions. No functionality changes. 2013-05-13 17:43:19 +00:00
Mips16InstrInfo.td [mips] Fix definitions of multiply, multiply-add/sub and divide instructions. 2013-03-30 01:36:35 +00:00
Mips16ISelDAGToDAG.cpp Access the TargetLoweringInfo from the TargetMachine object instead of caching it. The TLI may change between functions. No functionality change. 2013-06-19 21:36:55 +00:00
Mips16ISelDAGToDAG.h Track IR ordering of SelectionDAG nodes 2/4. 2013-05-25 02:42:55 +00:00
Mips16ISelLowering.cpp Mips: Remove global set. 2013-06-13 19:06:52 +00:00
Mips16ISelLowering.h Mips: Remove global set. 2013-06-13 19:06:52 +00:00
Mips16RegisterInfo.cpp Don't cache the instruction and register info from the TargetMachine, because 2013-06-07 07:04:14 +00:00
Mips16RegisterInfo.h Don't cache the instruction and register info from the TargetMachine, because 2013-06-07 07:04:14 +00:00
Mips64InstrInfo.td [mips] Add instruction selection patterns for blez and bgez. 2013-05-21 17:13:47 +00:00
Mips.h [mips] Add an IR transformation pass that optimizes calls to sqrt. 2013-06-11 22:21:44 +00:00
Mips.td [mips] Remove android calling convention. 2013-03-05 23:22:30 +00:00
MipsAnalyzeImmediate.cpp Replace Count{Leading,Trailing}Zeros_{32,64} with count{Leading,Trailing}Zeros. 2013-05-24 22:23:49 +00:00
MipsAnalyzeImmediate.h Fix undefined behavior in the Mips backend. 2012-03-09 06:36:45 +00:00
MipsAsmPrinter.cpp [mips] Do not emit ".option pic0" if target is mips64. 2013-06-26 19:08:49 +00:00
MipsAsmPrinter.h DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineInstrs 2013-06-16 20:34:27 +00:00
MipsCallingConv.td Mips td file formatting: white space and long lines 2013-05-16 20:08:49 +00:00
MipsCodeEmitter.cpp Don't cache the instruction and register info from the TargetMachine, because 2013-06-07 07:04:14 +00:00
MipsCondMov.td [mips] Fix inefficient code generation. 2013-03-01 21:52:08 +00:00
MipsConstantIslandPass.cpp Don't cache the instruction and register info from the TargetMachine, because 2013-06-07 07:04:14 +00:00
MipsDelaySlotFiller.cpp Don't cache the instruction and register info from the TargetMachine, because 2013-06-07 07:04:14 +00:00
MipsDSPInstrFormats.td [mips] DSP-ASE move from HI/LO register instructions. 2013-04-18 00:52:44 +00:00
MipsDSPInstrInfo.td [mips] Split the DSP control register and define one register for each field of 2013-05-03 18:37:49 +00:00
MipsFrameLowering.cpp Move all of the header files which are involved in modelling the LLVM IR 2013-01-02 11:36:10 +00:00
MipsFrameLowering.h [mips] Add parameter Alignment to MipsFrameLowering's constructor. 2013-03-29 01:51:04 +00:00
MipsInstrFormats.td [mips] Trap on integer division by zero. 2013-05-20 18:07:43 +00:00
MipsInstrFPU.td This patch introduces RegisterOperand class into Mips FPU instruction definitions and adds dedicated parser methods to MipsAsmParser. It is the first in a series of patches that should fix the problems with parsing Mips FPU instructions and optimize the code in MipsAsmParser. 2013-06-24 10:05:34 +00:00
MipsInstrInfo.cpp DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineInstrs 2013-06-16 20:34:27 +00:00
MipsInstrInfo.h DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineInstrs 2013-06-16 20:34:27 +00:00
MipsInstrInfo.td [mips] brcond + setgt/setugt instruction selection patterns. 2013-06-05 19:49:55 +00:00
MipsISelDAGToDAG.cpp Access the TargetLoweringInfo from the TargetMachine object instead of caching it. The TLI may change between functions. No functionality change. 2013-06-19 21:36:55 +00:00
MipsISelDAGToDAG.h [mips] Rename functions and variables to start with proper case. 2013-03-14 18:33:23 +00:00
MipsISelLowering.cpp The getRegForInlineAsmConstraint function should only accept MVT value types. 2013-06-22 18:37:38 +00:00
MipsISelLowering.h The getRegForInlineAsmConstraint function should only accept MVT value types. 2013-06-22 18:37:38 +00:00
MipsJITInfo.cpp Move all of the header files which are involved in modelling the LLVM IR 2013-01-02 11:36:10 +00:00
MipsJITInfo.h Classic JIT is still being supported by MIPS, along with MCJIT. 2012-12-03 23:11:12 +00:00
MipsLongBranch.cpp Don't cache the instruction and register info from the TargetMachine, because 2013-06-07 07:04:14 +00:00
MipsMachineFunction.cpp [mips] Lower EH_RETURN. 2013-01-30 00:26:49 +00:00
MipsMachineFunction.h [mips] Lower EH_RETURN. 2013-01-30 00:26:49 +00:00
MipsMCInstLower.cpp Use the new script to sort the includes of every file under lib. 2012-12-03 16:50:05 +00:00
MipsMCInstLower.h MIPS DSP: add code necessary for pseudo instruction lowering. 2012-09-27 01:59:07 +00:00
MipsModuleISelDAGToDAG.cpp This patch enables llvm to switch between compiling for mips32/mips64 2013-04-09 19:46:01 +00:00
MipsModuleISelDAGToDAG.h This patch enables llvm to switch between compiling for mips32/mips64 2013-04-09 19:46:01 +00:00
MipsOptimizeMathLibCalls.cpp [mips] Add an IR transformation pass that optimizes calls to sqrt. 2013-06-11 22:21:44 +00:00
MipsOs16.cpp 80 columns. 2013-04-22 20:13:37 +00:00
MipsOs16.h This is for an experimental option -mips-os16. The idea is to compile all 2013-04-10 16:58:04 +00:00
MipsRegisterInfo.cpp Checkin in of first of several patches to finish implementation of 2013-05-10 22:25:39 +00:00
MipsRegisterInfo.h Checkin in of first of several patches to finish implementation of 2013-05-10 22:25:39 +00:00
MipsRegisterInfo.td This patch introduces RegisterOperand class into Mips FPU instruction definitions and adds dedicated parser methods to MipsAsmParser. It is the first in a series of patches that should fix the problems with parsing Mips FPU instructions and optimize the code in MipsAsmParser. 2013-06-24 10:05:34 +00:00
MipsRelocations.h remove blanks, and some code format 2012-02-28 07:46:26 +00:00
MipsSchedule.td remove blanks, and some code format 2012-02-28 07:46:26 +00:00
MipsSEFrameLowering.cpp Use pointers to the MCAsmInfo and MCRegInfo. 2013-06-18 07:20:20 +00:00
MipsSEFrameLowering.h [mips] Add parameter Alignment to MipsFrameLowering's constructor. 2013-03-29 01:51:04 +00:00
MipsSEInstrInfo.cpp [mips] Use function TargetInstrInfo::getRegClass. 2013-06-11 18:48:16 +00:00
MipsSEInstrInfo.h [mips] Use function TargetInstrInfo::getRegClass. 2013-06-11 18:48:16 +00:00
MipsSEISelDAGToDAG.cpp Access the TargetLoweringInfo from the TargetMachine object instead of caching it. The TLI may change between functions. No functionality change. 2013-06-19 21:36:55 +00:00
MipsSEISelDAGToDAG.h Track IR ordering of SelectionDAG nodes 2/4. 2013-05-25 02:42:55 +00:00
MipsSEISelLowering.cpp [mips] Improve code generation for constant multiplication using shifts, adds and 2013-06-26 18:48:17 +00:00
MipsSEISelLowering.h [mips] Move MipsTargetLowering::lowerINTRINSIC_W_CHAIN and 2013-04-13 02:13:30 +00:00
MipsSelectionDAGInfo.cpp remove Emacs-tag form .cpp files in Mips Backend, and fix some typo. 2012-02-17 08:55:11 +00:00
MipsSelectionDAGInfo.h
MipsSERegisterInfo.cpp Don't cache the instruction and register info from the TargetMachine, because 2013-06-07 07:04:14 +00:00
MipsSERegisterInfo.h Don't cache the instruction and register info from the TargetMachine, because 2013-06-07 07:04:14 +00:00
MipsSubtarget.cpp Checkin in of first of several patches to finish implementation of 2013-05-10 22:25:39 +00:00
MipsSubtarget.h Checkin in of first of several patches to finish implementation of 2013-05-10 22:25:39 +00:00
MipsTargetMachine.cpp [mips] Add an IR transformation pass that optimizes calls to sqrt. 2013-06-11 22:21:44 +00:00
MipsTargetMachine.h This patch enables llvm to switch between compiling for mips32/mips64 2013-04-09 19:46:01 +00:00
MipsTargetObjectFile.cpp This is a resubmittal. For some reason it broke the bots yesterday 2013-01-18 21:20:38 +00:00
MipsTargetObjectFile.h This is a resubmittal. For some reason it broke the bots yesterday 2013-01-18 21:20:38 +00:00