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905a29152f
llvm-6502/lib/Target/PowerPC
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Nate Begeman 905a29152f Implement more complete and correct codegen for bitfield inserts, as tested 
by the recently committed rlwimi.ll test file.  Also commit initial code
for bitfield extract, although it is turned off until fully debugged.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17207 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-24 10:33:30 +00:00
..
LICENSE.TXT
Makefile Remove extraneous blank line 2004-10-23 04:59:22 +00:00
PowerPC.td PowerPC instruction definitions use LittleEndian-style encoding [0..31] 2004-10-14 05:54:38 +00:00
PowerPCInstrInfo.h The PowerPCInstrInfo class has gone away. 2004-08-17 05:00:46 +00:00
PowerPCRegisterInfo.h PowerPCRegisterInfo no longer takes a bool to differentiate 32 vs 64 bits 2004-08-17 05:02:18 +00:00
PowerPCTargetMachine.h All PPC instructions are now auto-printed 2004-09-04 05:00:00 +00:00
PPC32.td PowerPC instruction definitions use LittleEndian-style encoding [0..31] 2004-10-14 05:54:38 +00:00
PPC32ISelSimple.cpp Implement more complete and correct codegen for bitfield inserts, as tested 2004-10-24 10:33:30 +00:00
PPC32JITInfo.h
PPC32RegisterInfo.td Switch from bytes to bits for alignment. 2004-08-21 20:14:40 +00:00
PPC64.td PowerPC instruction definitions use LittleEndian-style encoding [0..31] 2004-10-14 05:54:38 +00:00
PPC64CodeEmitter.cpp
PPC64InstrInfo.cpp PowerPC 32-/64-bit split: Part II, 64-bit customizations on PowerPC 2004-08-17 04:57:37 +00:00
PPC64InstrInfo.h PowerPC 32-/64-bit split: Part II, 64-bit customizations on PowerPC 2004-08-17 04:57:37 +00:00
PPC64ISelSimple.cpp Several fixes and enhancements to the PPC32 backend. 2004-10-07 22:30:03 +00:00
PPC64JITInfo.h
PPC64RegisterInfo.cpp Correct some BuildMI arguments for the upcoming simple scheduler 2004-09-27 05:08:17 +00:00
PPC64RegisterInfo.h PowerPC 32-/64-bit split: Part II, 64-bit customizations on PowerPC 2004-08-17 04:57:37 +00:00
PPC64RegisterInfo.td Switch from bytes to bits for alignment. 2004-08-21 20:14:40 +00:00
PPC64TargetMachine.h PowerPC 32-/64-bit split: Part II, 64-bit customizations on PowerPC 2004-08-17 04:57:37 +00:00
PPC.h All PPC instructions are now auto-printed 2004-09-04 05:00:00 +00:00
PPCAsmPrinter.cpp Align function arguments in function headers 2004-10-23 04:58:32 +00:00
PPCBranchSelector.cpp Remove unnecessary header include 2004-10-07 22:24:32 +00:00
PPCCodeEmitter.cpp * Correctly handle the MovePCtoLR pseudo-instr with a bl to next instr 2004-10-23 23:47:34 +00:00
PPCFrameInfo.h LR needs to be saved at 16-byte offset on a 64-bit arch 2004-08-19 21:36:14 +00:00
PPCInstrBuilder.h
PPCInstrFormats.td DForm_1, particularly used by store instructions, needs the immediate operand to 2004-10-23 06:08:38 +00:00
PPCInstrInfo.cpp Add ori reg, reg, 0 as a move instruction. This can be generated from 2004-10-07 22:26:12 +00:00
PPCInstrInfo.h
PPCInstrInfo.td Add BA, BL, and BLA opcodes 2004-10-23 20:29:24 +00:00
PPCJITInfo.h
PPCRegisterInfo.cpp Correct some BuildMI arguments for the upcoming simple scheduler 2004-09-27 05:08:17 +00:00
PPCRegisterInfo.h
PPCRegisterInfo.td Revamp the Register class, and allow the use of the RegisterGroup class to 2004-09-14 04:17:02 +00:00
PPCTargetMachine.cpp bling bling! 2004-10-10 16:26:13 +00:00
PPCTargetMachine.h All PPC instructions are now auto-printed 2004-09-04 05:00:00 +00:00
README.txt All PPC instructions are now auto-printed 2004-09-04 05:00:00 +00:00

README.txt 

TODO:
* implement not-R0 register GPR class
* fix rlwimi generation to be use-and-def
* implement scheduling info
* implement powerpc-64 for darwin
* implement powerpc-64 for aix
* use stfiwx in float->int
* should hint to the branch select pass that it doesn't need to print the
  second unconditional branch, so we don't end up with things like:
	b .LBBl42__2E_expand_function_8_674	; loopentry.24
	b .LBBl42__2E_expand_function_8_42	; NewDefault
	b .LBBl42__2E_expand_function_8_42	; NewDefault

Currently failing tests that should pass:
* MultiSource
  |- Applications
  |  `- hbd: miscompilation