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llvm-6502/test/CodeGen/Hexagon
History
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absaddr-store.ll
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absimm.ll
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adde.ll
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always-ext.ll
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args.ll
Hexagon: Pass to replace tranfer/copy instructions into combine instruction
2013-05-14 18:54:06 +00:00
ashift-left-right.ll
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block-addr.ll
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BranchPredict.ll
TBAA: remove !tbaa from testing cases when they are not needed.
2013-09-30 18:17:35 +00:00
cext-check.ll
Hexagon: Move HexagonMCInst.h to MCTargetDesc/HexagonMCInst.h.
2013-02-20 16:13:27 +00:00
cext-valid-packet1.ll
Hexagon: Add constant extender support framework.
2013-03-01 17:37:13 +00:00
cext-valid-packet2.ll
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cmp_pred2.ll
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cmp_pred_reg.ll
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cmp_pred.ll
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cmp-not.ll
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cmp-to-genreg.ll
Hexagon: Add V4 compare instructions. Enable relationship mapping
2013-02-05 16:42:24 +00:00
cmp-to-predreg.ll
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cmpb_pred.ll
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combine_ir.ll
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combine.ll
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convertdptoint.ll
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convertdptoll.ll
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convertsptoint.ll
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convertsptoll.ll
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ctlz-cttz-ctpop.ll
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dadd.ll
Hexagon V5 FP Support.
2012-05-10 20:20:25 +00:00
dmul.ll
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double.ll
Enable all Hexagon tests.
2012-05-15 16:13:12 +00:00
doubleconvert-ieee-rnd-near.ll
Hexagon V5 FP Support.
2012-05-10 20:20:25 +00:00
dsub.ll
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dualstore.ll
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extload-combine.ll
Hexagon: Add patterns to generate 'combine' instructions.
2013-05-14 17:16:38 +00:00
fadd.ll
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fcmp.ll
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float.ll
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floatconvert-ieee-rnd-near.ll
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fmul.ll
Hexagon V5 FP Support.
2012-05-10 20:20:25 +00:00
frame.ll
Enable all Hexagon tests.
2012-05-15 16:13:12 +00:00
fsub.ll
Hexagon V5 FP Support.
2012-05-10 20:20:25 +00:00
fusedandshift.ll
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gp-plus-offset-load.ll
Hexagon: Use absolute addressing mode loads/stores for global+offset
2013-02-13 21:38:46 +00:00
gp-plus-offset-store.ll
Hexagon: Use absolute addressing mode loads/stores for global+offset
2013-02-13 21:38:46 +00:00
gp-rel.ll
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hwloop-cleanup.ll
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hwloop-const.ll
TBAA: remove !tbaa from testing cases if not used.
2013-04-30 17:52:57 +00:00
hwloop-dbg.ll
DebugInfo: Assert that any CU for which debug_loc lists are emitted, has at least one range.
2014-08-06 00:21:25 +00:00
hwloop-le.ll
Extend Hexagon hardware loop generation to handle various additional cases:
2013-02-11 21:37:55 +00:00
hwloop-lt1.ll
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hwloop-lt.ll
Extend Hexagon hardware loop generation to handle various additional cases:
2013-02-11 21:37:55 +00:00
hwloop-ne.ll
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i1_VarArg.ll
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i8_VarArg.ll
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i16_VarArg.ll
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idxload-with-zero-offset.ll
Hexagon: Test case to confirm generation of indexed loads with zero offset.
2013-02-01 16:40:06 +00:00
indirect-br.ll
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lit.local.cfg
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macint.ll
Support for target dependent Hexagon VLIW packetizer.
2012-05-03 21:52:53 +00:00
memops1.ll
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memops2.ll
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memops3.ll
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memops.ll
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misaligned-access.ll
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mpy.ll
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newvaluejump2.ll
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newvaluejump.ll
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newvaluestore.ll
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opt-fabs.ll
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opt-fneg.ll
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packetize_cond_inst.ll
Fix broken CHECK lines
2014-02-16 07:31:05 +00:00
postinc-load.ll
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postinc-store.ll
Hexagon: Add testcase for post-increment store instructions.
2013-02-05 18:23:51 +00:00
pred-absolute-store.ll
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pred-gp.ll
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pred-instrs.ll
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predicate-copy.ll
Hexagon: add support for predicate-GPR copies.
2013-02-13 22:56:34 +00:00
remove_lsr.ll
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simpletailcall.ll
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split-const32-const64.ll
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static.ll
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struct_args_large.ll
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struct_args.ll
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sube.ll
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tail-call-trunc.ll
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tfr-to-combine.ll
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union-1.ll
TBAA: remove !tbaa from testing cases when they are not needed.
2013-09-30 18:17:35 +00:00
vaddh.ll
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validate-offset.ll
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zextloadi1.ll
Convert CodeGen/*/*.ll tests to use the new CHECK-LABEL for easier debugging. No functionality change and all tests pass after conversion.
2013-07-13 20:38:47 +00:00