llvm-6502/lib/Target/AArch64
Pirama Arumuga Nainar dab5145cb3 [AArch64] Add nvcast patterns for v4f16 and v8f16
Summary:
Constant stores of f16 vectors can create NvCast nodes from various
operand types to v4f16 or v8f16 depending on patterns in the stored
constants.  This patch adds nvcast rules with v4f16 and v8f16 values.

AArchISelLowering::LowerBUILD_VECTOR has the details on which constant
patterns generate the nvcast nodes.

Reviewers: jmolloy, srhines, ab

Subscribers: rengolin, aemerson, llvm-commits

Differential Revision: http://reviews.llvm.org/D9201

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235610 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-23 17:32:25 +00:00
..
AsmParser [AArch64] Refactor AArch64NamedImmMapper to become dependent on subtarget features. 2015-04-16 12:15:27 +00:00
Disassembler [AArch64] Add v8.1a "Limited Ordering Regions" extension 2015-04-16 15:30:43 +00:00
InstPrinter [AArch64] Refactor AArch64NamedImmMapper to become dependent on subtarget features. 2015-04-16 12:15:27 +00:00
MCTargetDesc [mc] Clean up emission of byte sequences 2015-04-17 11:12:43 +00:00
TargetInfo
Utils [AArch64] LORID_EL1 register must be treated as read-only 2015-04-20 16:54:37 +00:00
AArch64.h
AArch64.td [AArch64] Rename v8.1a from "extension" to "architecture" 2015-04-01 14:49:29 +00:00
AArch64A53Fix835769.cpp Purge unused includes throughout libSupport. 2015-03-23 18:07:13 +00:00
AArch64A57FPLoadBalancing.cpp unique_ptrs are unique already, no need to unique them any further. 2015-03-13 16:59:29 +00:00
AArch64AddressTypePromotion.cpp Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used. 2015-03-23 19:32:43 +00:00
AArch64AdvSIMDScalarPass.cpp
AArch64AsmPrinter.cpp DebugInfo: Gut DIVariable and DIGlobalVariable 2015-04-14 02:22:36 +00:00
AArch64BranchRelaxation.cpp
AArch64CallingConvention.h
AArch64CallingConvention.td
AArch64CleanupLocalDynamicTLSPass.cpp Fix PR22408 - LLVM producing AArch64 TLS relocations that GNU linkers cannot handle yet. 2015-03-04 09:12:08 +00:00
AArch64CollectLOH.cpp Change range-based for-loops to be -Wrange-loop-analysis clean. 2015-04-15 01:21:15 +00:00
AArch64ConditionalCompares.cpp AArch64: Canonicalize access to function attributes, NFC 2015-02-14 02:09:06 +00:00
AArch64ConditionOptimizer.cpp [AArch64] Use MachineRegisterInfo instead of LiveIntervals to calculate liveness. NFC. 2015-04-22 18:05:13 +00:00
AArch64DeadRegisterDefinitionsPass.cpp
AArch64ExpandPseudoInsts.cpp Transfer implicit operands when expanding the RET_ReallyLR pseudo instruction. 2015-03-30 22:45:56 +00:00
AArch64FastISel.cpp Disable AArch64 fast-isel on big-endian call vector returns. 2015-04-16 21:19:36 +00:00
AArch64FrameLowering.cpp [AArch64] Strengthen the code for the prologue insertion. 2015-04-10 23:14:34 +00:00
AArch64FrameLowering.h [AArch64] Add support for dynamic stack alignment 2015-04-09 08:49:47 +00:00
AArch64InstrAtomics.td
AArch64InstrFormats.td [AArch64] Add v8.1a "Limited Ordering Regions" extension 2015-04-16 15:30:43 +00:00
AArch64InstrInfo.cpp [AArch64] Fix invalid use of references to BuildMI. 2015-04-16 11:37:40 +00:00
AArch64InstrInfo.h Revert "Migrate the AArch64 TargetRegisterInfo to its TargetMachine" 2015-03-18 20:37:30 +00:00
AArch64InstrInfo.td [AArch64] Add nvcast patterns for v4f16 and v8f16 2015-04-23 17:32:25 +00:00
AArch64ISelDAGToDAG.cpp [AArch64] Don't force MVT::Untyped when selecting LD1LANEpost. 2015-04-17 23:43:33 +00:00
AArch64ISelLowering.cpp [AArch64] Handle vec4, vec8, vec16 *itofp for half 2015-04-23 17:16:27 +00:00
AArch64ISelLowering.h AArch64: Don't lower ISD::SELECT to ISD::SELECT_CC 2015-04-07 17:33:05 +00:00
AArch64LoadStoreOptimizer.cpp [AArch64][LoadStoreOptimizer] Generate LDP + SXTW instead of LD[U]R + LD[U]RSW. 2015-03-06 22:42:10 +00:00
AArch64MachineCombinerPattern.h
AArch64MachineFunctionInfo.h
AArch64MCInstLower.cpp Fix PR22408 - LLVM producing AArch64 TLS relocations that GNU linkers cannot handle yet. 2015-03-04 09:12:08 +00:00
AArch64MCInstLower.h
AArch64PBQPRegAlloc.cpp Avoid copying LiveInterval, this could lead to a double-delete 2015-03-03 22:25:48 +00:00
AArch64PBQPRegAlloc.h
AArch64PerfectShuffle.h
AArch64PromoteConstant.cpp Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used. 2015-03-23 19:32:43 +00:00
AArch64RegisterInfo.cpp [AArch64] Add support for dynamic stack alignment 2015-04-09 08:49:47 +00:00
AArch64RegisterInfo.h [AArch64] Add support for dynamic stack alignment 2015-04-09 08:49:47 +00:00
AArch64RegisterInfo.td
AArch64SchedA53.td
AArch64SchedA57.td [AArch64] Changes some SchedAlias to WriteRes for Cortex-A57. 2015-04-10 13:19:27 +00:00
AArch64SchedA57WriteRes.td
AArch64SchedCyclone.td
AArch64Schedule.td
AArch64SelectionDAGInfo.cpp Get the cached subtarget off the MachineFunction rather than 2015-02-20 08:39:06 +00:00
AArch64SelectionDAGInfo.h
AArch64StorePairSuppress.cpp
AArch64Subtarget.cpp [AArch64] Rename v8.1a from "extension" to "architecture" 2015-04-01 14:49:29 +00:00
AArch64Subtarget.h [AArch64] Rename v8.1a from "extension" to "architecture" 2015-04-01 14:49:29 +00:00
AArch64TargetMachine.cpp [AArch64] Disable complex GEP optimization by default. 2015-04-22 09:11:38 +00:00
AArch64TargetMachine.h Remove the bare getSubtargetImpl call from the AArch64 port. As part 2015-03-21 04:04:50 +00:00
AArch64TargetObjectFile.cpp [AsmPrinter][TLOF] 32-bit MachO support for replacing GOT equivalents 2015-03-06 13:49:05 +00:00
AArch64TargetObjectFile.h [AsmPrinter][TLOF] 32-bit MachO support for replacing GOT equivalents 2015-03-06 13:49:05 +00:00
AArch64TargetTransformInfo.cpp [AArch64] Enable partial & runtime unrolling on cortex-a57 2015-03-09 06:14:28 +00:00
AArch64TargetTransformInfo.h
CMakeLists.txt
LLVMBuild.txt
Makefile