llvm-6502/lib/Target/PowerPC
Chris Lattner b6482069f0 There is no need for a cast here
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15810 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-16 05:09:58 +00:00
..
LICENSE.TXT Added Louis Gerbarg. Louis is given credit in the CREDITS.TXT file, so I 2004-08-05 23:46:27 +00:00
Makefile Add generation of asm writer from tablegen files to Makefile 2004-08-14 22:06:38 +00:00
PowerPC.td * Fix file header to use tablegen emacs mode instead of c++ 2004-08-10 21:24:44 +00:00
PowerPCInstrInfo.cpp Set the is64bit flag and propagate it to PowerPCRegisterInfo 2004-08-11 23:45:43 +00:00
PowerPCInstrInfo.h Set the is64bit flag and propagate it to PowerPCRegisterInfo 2004-08-11 23:45:43 +00:00
PowerPCRegisterInfo.cpp Fix typo of the word 'implicit' I made resolving a CVS conflict. Whoops! 2004-08-16 02:12:49 +00:00
PowerPCRegisterInfo.h Insertion methods now return void instead of #instrs inserted. Also, use 2004-08-15 22:15:56 +00:00
PowerPCTargetMachine.h Replace PowerPCPEI.cpp with target independant PrologEpilogInserter 2004-08-14 22:16:36 +00:00
PPC32AsmPrinter.cpp Zimm16 is now dead. Its entry is not removed from the enum, to avoid having 2004-08-15 05:48:47 +00:00
PPC32ISelSimple.cpp Fix mismatched adjust down/up of SP in functions that contain variable 2004-08-16 01:50:22 +00:00
PPC32JITInfo.h Clean up 32/64bit and Darwin/AIX split. Next steps: 64 bit ISel, AIX asm printer. 2004-08-11 07:40:04 +00:00
PPC64AsmPrinter.cpp Zimm16 is now dead. Its entry is not removed from the enum, to avoid having 2004-08-15 05:48:47 +00:00
PPC64CodeEmitter.cpp Breaking up the PowerPC target into 32- and 64-bit subparts: Part II: 64-bit. 2004-08-11 00:10:41 +00:00
PPC64ISelSimple.cpp Longs are in one register on PowerPC 64; use appropriate instructions to operate on them. 2004-08-13 02:20:47 +00:00
PPC64JITInfo.h Clean up 32/64bit and Darwin/AIX split. Next steps: 64 bit ISel, AIX asm printer. 2004-08-11 07:40:04 +00:00
PPC64TargetMachine.h Clean up 32/64bit and Darwin/AIX split. Next steps: 64 bit ISel, AIX asm printer. 2004-08-11 07:40:04 +00:00
PPC.h Replace PowerPCPEI.cpp with target independant PrologEpilogInserter 2004-08-14 22:16:36 +00:00
PPCAsmPrinter.cpp Zimm16 is now dead. Its entry is not removed from the enum, to avoid having 2004-08-15 05:48:47 +00:00
PPCBranchSelector.cpp Renamed PPC32 (namespace for regs, opcodes) to PPC to include 64-bit targets 2004-08-10 22:47:03 +00:00
PPCCodeEmitter.cpp Breaking up the PowerPC target into 32- and 64-bit subparts, Part I: 32-bit. 2004-08-11 00:09:42 +00:00
PPCFrameInfo.h There is no need for a cast here 2004-08-16 05:09:58 +00:00
PPCInstrBuilder.h * Wrap long lines (comments and code) 2004-07-07 20:01:36 +00:00
PPCInstrFormats.td Convert all of the DForm_6* operations, which makes all of the Zimm16 users 2004-08-15 05:46:14 +00:00
PPCInstrInfo.td Convert all of the DForm_6* operations, which makes all of the Zimm16 users 2004-08-15 05:46:14 +00:00
PPCJITInfo.h Breaking up the PowerPC target into 32- and 64-bit subparts, Part III: the rest. 2004-08-11 00:11:25 +00:00
PPCRegisterInfo.td Fix frame pointer handling: 2004-08-16 01:52:12 +00:00
PPCTargetMachine.cpp Replace PowerPCPEI.cpp with target independant PrologEpilogInserter 2004-08-14 22:16:36 +00:00
PPCTargetMachine.h Remove an unneeded header and forward declaration 2004-08-13 09:33:17 +00:00
README.txt Update the current state of the world 2004-08-16 05:06:43 +00:00

TODO:
* use stfiwx in float->int
* implement cast fp to bool
* implement algebraic shift right long by reg
* implement scheduling info
* implement powerpc-64 for darwin
* implement powerpc-64 for aix
* fix rlwimi generation to be use-and-def
* fix ulong to double:
  floatdidf assumes signed longs.  so if the high but of a ulong
  just happens to be set, you get the wrong sign.  The fix for this
  is to call cmpdi2 to compare against zero, if so shift right by one,
  convert to fp, and multiply by (add to itself).  the sequence would
  look like:
  {r3:r4} holds ulong a;
  li r5, 0
  li r6, 0 (set r5:r6 to ulong 0)
  call cmpdi2 ==> sets r3 <, =, > 0
  if r3 > 0
  call floatdidf as usual
  else
  shift right ulong a, 1 (we could use emitShift)
  call floatdidf
  fadd f1, f1, f1 (fp left shift by 1)
* setCondInst needs to know branchless versions of seteq/setne/etc
* cast elimination pass (uint -> sbyte -> short, kill the byte -> short)
* should hint to the branch select pass that it doesn't need to print the
  second unconditional branch, so we don't end up with things like:
	b .LBBl42__2E_expand_function_8_674	; loopentry.24
	b .LBBl42__2E_expand_function_8_42	; NewDefault
	b .LBBl42__2E_expand_function_8_42	; NewDefault

Currently failing tests that should pass:
* SingleSource
  `- Regression
  |  `- casts (ulong to fp failure)
  `- Benchmarks
  |  `- Shootout-C++ : most programs fail, miscompilations
* MultiSource
  |- Applications
  |  `- hbd: miscompilation
  |  `- d (make_dparser): miscompilation
  `- Benchmarks
     `- MallocBench/gs: miscompilation