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b900895384
llvm-6502/test/CodeGen/PowerPC
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Bill Schmidt b900895384 [PowerPC 1/4] Little-endian adjustments for VSX loads/stores 
This patch addresses the inherent big-endian bias in the lxvd2x,
lxvw4x, stxvd2x, and stxvw4x instructions.  These instructions load
vector elements into registers left-to-right (with the first element
loaded into the high-order bits of the register), regardless of the
endian setting of the processor.  However, these are the only
vector memory instructions that permit unaligned storage accesses, so
we want to use them for little-endian.

To make this work, a lxvd2x or lxvw4x is replaced with an lxvd2x
followed by an xxswapd, which swaps the doublewords.  This works for
lxvw4x as well as lxvd2x, because for lxvw4x on an LE system the
vector elements are in LE order (right-to-left) within each
doubleword.  (Thus after lxvw2x of a <4 x float> the elements will
appear as 1, 0, 3, 2.  Following the swap, they will appear as 3, 2,
0, 1, as desired.)   For stores, an stxvd2x or stxvw4x is replaced
with an stxvd2x preceded by an xxswapd.

Introduction of extra swap instructions provides correctness, but
obviously is not ideal from a performance perspective.  Future patches
will address this with optimizations to remove most of the introduced
swaps, which have proven effective in other implementations.

The introduction of the swaps is performed during lowering of LOAD,
STORE, INTRINSIC_W_CHAIN, and INTRINSIC_VOID operations.  The latter
are used to translate intrinsics that specify the VSX loads and stores
directly into equivalent sequences for little endian.  Thus code that
uses vec_vsx_ld and vec_vsx_st does not have to be modified to be
ported from BE to LE.

We introduce new PPCISD opcodes for LXVD2X, STXVD2X, and XXSWAPD for
use during this lowering step.  In PPCInstrVSX.td, we add new SDType
and SDNode definitions for these (PPClxvd2x, PPCstxvd2x, PPCxxswapd).
These are recognized during instruction selection and mapped to the
correct instructions.

Several tests that were written to use -mcpu=pwr7 or pwr8 are modified
to disable VSX on LE variants because code generation changes with
this and subsequent patches in this set.  I chose to include all of
these in the first patch than try to rigorously sort out which tests
were broken by one or another of the patches.  Sorry about that.

The new test vsx-ldst-builtin-le.ll, and the changes to vsx-ldst.ll,
are disabled until LE support is enabled because of breakages that
occur as noted in those tests.  They are re-enabled in patch 4/4.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223783 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 16:35:51 +00:00
..
2004-11-29-ShrCrash.ll
2004-11-30-shift-crash.ll
2004-11-30-shr-var-crash.ll
2004-12-12-ZeroSizeCommon.ll
2005-01-14-SetSelectCrash.ll
2005-01-14-UndefLong.ll
2005-08-12-rlwimi-crash.ll
2005-09-02-LegalizeDuplicatesCalls.ll
2005-10-08-ArithmeticRotate.ll
2005-11-30-vastart-crash.ll
2006-01-11-darwin-fp-argument.ll
2006-01-20-ShiftPartsCrash.ll
2006-04-01-FloatDoubleExtend.ll
2006-04-05-splat-ish.ll
2006-04-19-vmaddfp-crash.ll
2006-05-12-rlwimi-crash.ll
2006-07-07-ComputeMaskedBits.ll
2006-07-19-stwbrx-crash.ll
2006-08-11-RetVector.ll
2006-08-15-SelectionCrash.ll
2006-09-28-shift_64.ll
2006-10-13-Miscompile.ll
2006-10-17-brcc-miscompile.ll
2006-10-17-ppc64-alloca.ll
2006-11-10-DAGCombineMiscompile.ll
2006-11-29-AltivecFPSplat.ll
2006-12-07-LargeAlloca.ll
2006-12-07-SelectCrash.ll
2007-01-04-ArgExtension.ll
2007-01-15-AsmDialect.ll
2007-01-29-lbrx-asm.ll
2007-01-31-InlineAsmAddrMode.ll
2007-02-16-AlignPacked.ll
2007-02-16-InlineAsmNConstraint.ll
2007-02-23-lr-saved-twice.ll
2007-03-24-cntlzd.ll
2007-03-30-SpillerCrash.ll
2007-04-24-InlineAsm-I-Modifier.ll
2007-04-30-InlineAsmEarlyClobber.ll
2007-05-03-InlineAsm-S-Constraint.ll
2007-05-14-InlineAsmSelectCrash.ll
2007-05-22-tailmerge-3.ll
2007-05-30-dagcombine-miscomp.ll
2007-06-28-BCCISelBug.ll
2007-08-04-CoalescerAssert.ll
2007-09-04-AltivecDST.ll
2007-09-07-LoadStoreIdxForms.ll
2007-09-08-unaligned.ll [PowerPC] Clean up -mattr=+vsx tests to always specify -mcpu 2014-10-19 21:29:21 +00:00
2007-09-11-RegCoalescerAssert.ll
2007-09-12-LiveIntervalsAssert.ll
2007-10-16-InlineAsmFrameOffset.ll
2007-10-18-PtrArithmetic.ll
2007-10-21-LocalRegAllocAssert2.ll
2007-10-21-LocalRegAllocAssert.ll
2007-11-04-CoalescerCrash.ll
2007-11-16-landingpad-split.ll
2007-11-19-VectorSplitting.ll
2008-02-05-LiveIntervalsAssert.ll
2008-02-09-LocalRegAllocAssert.ll
2008-03-05-RegScavengerAssert.ll
2008-03-17-RegScavengerCrash.ll
2008-03-18-RegScavengerAssert.ll
2008-03-24-AddressRegImm.ll
2008-03-24-CoalescerBug.ll
2008-03-26-CoalescerBug.ll
2008-04-10-LiveIntervalCrash.ll
2008-04-16-CoalescerBug.ll
2008-04-23-CoalescerCrash.ll
2008-05-01-ppc_fp128.ll
2008-06-19-LegalizerCrash.ll
2008-06-21-F128LoadStore.ll
2008-06-23-LiveVariablesCrash.ll
2008-07-10-SplatMiscompile.ll [PATCH] Correct type used for VADD_SPLAT optimization on PowerPC 2014-05-27 15:57:51 +00:00
2008-07-15-Bswap.ll
2008-07-15-Fabs.ll
2008-07-15-SignExtendInreg.ll
2008-07-17-Fneg.ll
2008-07-24-PPC64-CCBug.ll
2008-09-12-CoalescerBug.ll
2008-10-17-AsmMatchingOperands.ll
2008-10-28-f128-i32.ll
2008-10-28-UnprocessedNode.ll
2008-10-31-PPCF128Libcalls.ll
2008-12-02-LegalizeTypeAssert.ll Eliminate more uses of llvm-as and llvm-dis. 2009-09-09 00:09:15 +00:00
2009-01-16-DeclareISelBug.ll
2009-03-17-LSRBug.ll
2009-05-28-LegalizeBRCC.ll
2009-07-16-InlineAsm-M-Operand.ll
2009-08-17-inline-asm-addr-mode-breakage.ll
2009-09-18-carrybit.ll
2009-11-15-ProcImpDefsBug.ll
2009-11-25-ImpDefBug.ll
2010-02-04-EmptyGlobal.ll
2010-02-12-saveCR.ll
2010-03-09-indirect-call.ll
2010-04-01-MachineCSEBug.ll
2010-05-03-retaddr1.ll
2010-10-11-Fast-Varargs.ll
2010-12-18-PPCStackRefs.ll
2011-12-05-NoSpillDupCR.ll
2011-12-06-SpillAndRestoreCR.ll
2011-12-08-DemandedBitsMiscompile.ll
2012-09-16-TOC-entry-check.ll
2012-10-11-dynalloc.ll
2012-10-12-bitcast.ll [PowerPC] Clean up -mattr=+vsx tests to always specify -mcpu 2014-10-19 21:29:21 +00:00
2012-11-16-mischedcall.ll
2013-05-15-preinc-fold.ll
2013-07-01-PHIElimBug.ll
a2-fp-basic.ll
a2q-stackalign.ll
a2q.ll
aa-tbaa.ll
addc.ll
addi-reassoc.ll
addrfuncstr.ll
alias.ll [PPC] Use alias symbols in address computation. 2014-05-29 15:41:38 +00:00
align.ll
allocate-r0.ll
altivec-ord.ll
and_add.ll
and_sext.ll
and_sra.ll
and-branch.ll
and-elim.ll
and-imm.ll
anon_aggr.ll [PowerPC] Fix FrameIndex handling in SelectAddressRegImm 2014-07-20 22:26:40 +00:00
ashr-neg1.ll
asm-constraints.ll Address comments on r217622 2014-09-12 14:26:36 +00:00
asm-dialect.ll
asm-Zy.ll
asym-regclass-copy.ll
atomic-1.ll IR: add "cmpxchg weak" variant to support permitted failure. 2014-06-13 14:24:07 +00:00
atomic-2.ll [Power] Improve the expansion of atomic loads/stores 2014-10-02 22:27:07 +00:00
Atomics-64.ll
atomics-fences.ll [Power] Use lwsync for non-seq_cst fences 2014-10-03 18:04:36 +00:00
atomics-indexed.ll [Power] Improve the expansion of atomic loads/stores 2014-10-02 22:27:07 +00:00
atomics.ll [Power] Improve the expansion of atomic loads/stores 2014-10-02 22:27:07 +00:00
available-externally.ll [PowerPC] 32-bit ELF PIC support 2014-07-18 23:29:49 +00:00
bdzlr.ll
big-endian-actual-args.ll
big-endian-call-result.ll
big-endian-formal-args.ll
blockaddress.ll [PowerPC] Load BlockAddress values from the TOC in 64-bit SVR4 code 2014-10-31 10:33:14 +00:00
branch-opt.ll
bswap-load-store.ll
buildvec_canonicalize.ll [PowerPC] Clean up -mattr=+vsx tests to always specify -mcpu 2014-10-19 21:29:21 +00:00
bv-pres-v8i1.ll
bv-widen-undef.ll
byval-agg-info.ll
byval-aliased.ll [PowerPC] Mark fixed-offset byvals as pointed-to by IR values 2014-08-16 00:17:05 +00:00
calls.ll
can-lower-ret.ll
cc.ll [PowerPC] 'cc' should be an alias only to 'cr0' 2014-12-04 00:46:20 +00:00
cmp-cmp.ll
coalesce-ext.ll
compare-duplicate.ll
compare-simm.ll
complex-return.ll [SDAG] Make the DAGCombine worklist not grow endlessly due to duplicate 2014-07-23 07:08:53 +00:00
constants.ll
copysignl.ll [PPC] Adjust some PowerPC tests to account for presence/absence of VSX 2014-10-17 01:41:22 +00:00
cr1eq-no-extra-moves.ll
cr1eq.ll
cr_spilling.ll
cr-spills.ll
crash.ll
crbit-asm.ll
crbits.ll
crsave.ll
ctr-cleanup.ll
ctrloop-asm.ll
ctrloop-cpsgn.ll
ctrloop-fp64.ll
ctrloop-i64.ll
ctrloop-large-ec.ll
ctrloop-le.ll
ctrloop-lt.ll
ctrloop-ne.ll
ctrloop-reg.ll
ctrloop-s000.ll
ctrloop-sh.ll
ctrloop-sums.ll
ctrloop-udivti3.ll
ctrloops.ll
cttz.ll
darwin-labels.ll
dbg.ll Revert "Revert "DI: Fold constant arguments into a single MDString"" 2014-10-03 20:01:09 +00:00
DbgValueOtherTargets.test
dcbt-sched.ll
delete-node.ll
div-2.ll
dyn-alloca-aligned.ll
early-ret2.ll Rename loop unrolling and loop vectorizer metadata to have a common prefix. 2014-06-25 15:41:00 +00:00
early-ret.ll
empty-functions.ll Add back tests for empty function in SPARC and PowerPC. 2014-09-15 22:11:07 +00:00
emptystruct.ll
eqv-andc-orc-nor.ll
extsh.ll
fabs.ll [PowerPC] Clean up -mattr=+vsx tests to always specify -mcpu 2014-10-19 21:29:21 +00:00
fast-isel-binary.ll
fast-isel-br-const.ll
fast-isel-call.ll [PowerPC] Temporarily disable VSX for PowerPC fast-isel tests 2014-10-19 20:48:47 +00:00
fast-isel-cmp-imm.ll [PowerPC] Temporarily disable VSX for PowerPC fast-isel tests 2014-10-19 20:48:47 +00:00
fast-isel-conversion-p5.ll [PPC64] Fix PR20071 (fctiduz generated for targets lacking that instruction) 2014-06-24 20:05:18 +00:00
fast-isel-conversion.ll [PowerPC] Temporarily disable VSX for PowerPC fast-isel tests 2014-10-19 20:48:47 +00:00
fast-isel-crash.ll
fast-isel-ext.ll
fast-isel-fold.ll
fast-isel-GEP-coalesce.ll
fast-isel-indirectbr.ll
fast-isel-load-store.ll [PowerPC] Temporarily disable VSX for PowerPC fast-isel tests 2014-10-19 20:48:47 +00:00
fast-isel-redefinition.ll
fast-isel-ret.ll [PowerPC] Temporarily disable VSX for PowerPC fast-isel tests 2014-10-19 20:48:47 +00:00
fast-isel-shifter.ll
fastisel-gep-promote-before-add.ll
fcpsgn.ll [PPC] Adjust some PowerPC tests to account for presence/absence of VSX 2014-10-17 01:41:22 +00:00
fdiv-combine.ll [PowerPC] Implement combineRepeatedFPDivisors 2014-11-24 23:45:21 +00:00
float-asmprint.ll
float-to-int.ll
floatPSA.ll
fma-mutate.ll [PowerPC] Avoid VSX FMA mutate when killed product reg = addend reg 2014-10-21 13:02:37 +00:00
fma.ll [PowerPC] Re-enable VSX test line for fma.ll with -mcpu=pwr7 2014-10-19 20:27:56 +00:00
fmaxnum.ll Add minnum / maxnum codegen 2014-10-21 23:01:01 +00:00
fminnum.ll Add minnum / maxnum codegen 2014-10-21 23:01:01 +00:00
fnabs.ll [PowerPC] Clean up -mattr=+vsx tests to always specify -mcpu 2014-10-19 21:29:21 +00:00
fneg.ll
fold-li.ll
fold-zero.ll
fp_to_uint.ll [PowerPC] Clean up -mattr=+vsx tests to always specify -mcpu 2014-10-19 21:29:21 +00:00
fp-branch.ll [PowerPC] Clean up -mattr=+vsx tests to always specify -mcpu 2014-10-19 21:29:21 +00:00
fp-int-fp.ll
fpcopy.ll
frame-size.ll
frameaddr.ll
Frames-alloca.ll [PowerPC] Allow stack frames without parameter save area 2014-06-23 13:47:52 +00:00
Frames-large.ll [PowerPC] Allow stack frames without parameter save area 2014-06-23 13:47:52 +00:00
Frames-leaf.ll
Frames-small.ll [PowerPC] Allow stack frames without parameter save area 2014-06-23 13:47:52 +00:00
frounds.ll
fsel.ll [PPC] Adjust some PowerPC tests to account for presence/absence of VSX 2014-10-17 01:41:22 +00:00
fsl-e500mc.ll
fsl-e5500.ll
fsqrt.ll [PPC] Adjust some PowerPC tests to account for presence/absence of VSX 2014-10-17 01:41:22 +00:00
func-addr.ll [PPC64] Fix PR19893 - improve code generation for local function addresses 2014-06-16 21:36:02 +00:00
glob-comp-aa-crash.ll
hello-reloc.s llvm-readobj: fix MachO relocatoin printing a bit. 2014-07-04 10:57:56 +00:00
hello.ll
hidden-vis-2.ll
hidden-vis.ll
i1-to-double.ll
i32-to-float.ll
i64_fp_round.ll
i64_fp.ll [PowerPC] Clean up -mattr=+vsx tests to always specify -mcpu 2014-10-19 21:29:21 +00:00
i64-to-float.ll
i128-and-beyond.ll
ia-mem-r0.ll [PowerPC] Fix inline asm memory operands not to use r0 2014-12-03 23:40:13 +00:00
ia-neg-const.ll [PowerPC] Print all inline-asm consts as signed numbers 2014-12-03 09:37:50 +00:00
iabs.ll
ifcvt.ll
illegal-element-type.ll
in-asm-f64-reg.ll
indexed-load.ll
indirectbr.ll
inlineasm-copy.ll "foo" is not a ppc instruction, don't try to parse it. 2014-02-13 15:33:35 +00:00
inlineasm-i64-reg.ll
int-fp-conv-0.ll
int-fp-conv-1.ll
inverted-bool-compares.ll
isel-rc-nox0.ll
isel.ll
ispositive.ll
itofp128.ll
jaggedstructs.ll
LargeAbsoluteAddr.ll
lbzux.ll
lha.ll
lit.local.cfg Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00
load-constant-addr.ll
load-shift-combine.ll
long-compare.ll
longdbl-truncate.ll
lsa.ll
lsr-postinc-pos.ll
mask64.ll
mature-mc-support.ll
mcm-1.ll Convert CodeGen/*/*.ll tests to use the new CHECK-LABEL for easier debugging. No functionality change and all tests pass after conversion. 2013-07-13 20:38:47 +00:00
mcm-2.ll MC uses .lcomm now, so adjust. 2014-08-04 21:06:00 +00:00
mcm-3.ll
mcm-4.ll [PPC] Adjust some PowerPC tests to account for presence/absence of VSX 2014-10-17 01:41:22 +00:00
mcm-5.ll
mcm-6.ll
mcm-7.ll
mcm-8.ll
mcm-9.ll
mcm-10.ll MC uses .lcomm now, so adjust. 2014-08-04 21:06:00 +00:00
mcm-11.ll
mcm-12.ll [PPC] Adjust some PowerPC tests to account for presence/absence of VSX 2014-10-17 01:41:22 +00:00
mcm-default.ll
mcm-obj-2.ll
mcm-obj.ll
mem_update.ll
mem-rr-addr-mode.ll
misched-inorder-latency.ll
misched.ll
mul-neg-power-2.ll
mul-with-overflow.ll
mulhs.ll
mulli64.ll
mult-alt-generic-powerpc64.ll
mult-alt-generic-powerpc.ll
named-reg-alloc-r0.ll
named-reg-alloc-r1-64.ll
named-reg-alloc-r1.ll
named-reg-alloc-r2-64.ll
named-reg-alloc-r2.ll
named-reg-alloc-r13-64.ll
named-reg-alloc-r13.ll
neg.ll
negctr.ll
no-dead-strip.ll
novrsave.ll
optcmp.ll
or-addressing-mode.ll
popcnt.ll
post-ra-ec.ll Handle early-clobber registers in the aggressive anti-dep breaker 2014-12-09 01:00:59 +00:00
ppc32-cyclecounter.ll [PowerPC] Fix readcyclecounter to be custom expanded for all 32-bit targets 2014-12-03 00:19:17 +00:00
ppc32-i1-vaarg.ll
ppc32-lshrti3.ll Don't use 128bit functions on PPC32. 2014-07-24 22:20:10 +00:00
ppc32-pic-large.ll Fix thet tests. 2014-11-12 16:40:00 +00:00
ppc32-pic.ll Fix thet tests. 2014-11-12 16:40:00 +00:00
ppc32-vacopy.ll
ppc64-32bit-addic.ll
ppc64-abi-extend.ll
ppc64-align-long-double.ll [PPC] Adjust some PowerPC tests to account for presence/absence of VSX 2014-10-17 01:41:22 +00:00
ppc64-altivec-abi.ll [PowerPC] Fix on-stack AltiVec arguments with 64-bit SVR4 2014-06-23 12:36:34 +00:00
ppc64-byval-align.ll [PowerPC] Fix testcase regression 2014-07-07 19:41:54 +00:00
ppc64-calls.ll [PowerPC] Simplify and improve loading into TOC register 2014-06-18 17:52:49 +00:00
ppc64-crash.ll
ppc64-cyclecounter.ll
ppc64-elf-abi.ll [PowerPC] Fix ppc64-elf-abi.ll test case on Darwin 2014-07-29 12:48:14 +00:00
ppc64-gep-opt.ll [PPC] Use SeparateConstOffsetFromGEP 2014-11-21 04:35:51 +00:00
ppc64-linux-func-size.ll
ppc64-prefetch.ll [PowerPC] Add support for dcbtst and icbt (prefetch) 2014-08-23 23:21:04 +00:00
ppc64-smallarg.ll [PowerPC] Fix small argument stack slot offset for LE 2014-06-20 16:34:05 +00:00
ppc64-toc.ll
ppc64-vaarg-int.ll
ppc64-zext.ll
ppc64le-aggregates.ll [PowerPC 1/4] Little-endian adjustments for VSX loads/stores 2014-12-09 16:35:51 +00:00
ppc64le-calls.ll [PowerPC] ELFv2 stack space reduction 2014-07-20 23:43:15 +00:00
ppc64le-crsave.ll [PowerPC] ELFv2 explicit CFI for CR fields 2014-07-21 00:03:18 +00:00
ppc64le-localentry.ll [PowerPC] ELFv2 function call changes 2014-07-20 23:31:44 +00:00
ppc64le-smallarg.ll [PowerPC] ELFv2 stack space reduction 2014-07-20 23:43:15 +00:00
ppc440-fp-basic.ll
ppc440-msync.ll [PowerPC] Modern Book-E cores support sync 2014-10-02 22:34:22 +00:00
ppc-prologue.ll
ppc-vaarg-agg.ll
ppcf128-1-opt.ll
ppcf128-1.ll Delete -std-compile-opts. 2014-10-16 20:00:02 +00:00
ppcf128-2.ll
ppcf128-3.ll
ppcf128-4.ll
ppcf128-endian.ll [PowerPC 1/4] Little-endian adjustments for VSX loads/stores 2014-12-09 16:35:51 +00:00
pr3711_widen_bit.ll
pr12757.ll
pr13641.ll
pr13891.ll
pr15031.ll
pr15359.ll
pr15630.ll [Power] Improve the expansion of atomic loads/stores 2014-10-02 22:27:07 +00:00
pr15632.ll
pr16556-2.ll
pr16556.ll
pr16573.ll
pr17168.ll Revert "Revert "DI: Fold constant arguments into a single MDString"" 2014-10-03 20:01:09 +00:00
pr17354.ll
pr18663-2.ll Disable IsSub subregister assert. pr18663. 2014-07-31 19:50:53 +00:00
pr18663.ll Disable IsSub subregister assert. pr18663. 2014-07-31 19:50:53 +00:00
pr20442.ll Fix ScalarEvolutionExpander when creating a PHI in a block with duplicate predecessors 2014-07-31 19:13:38 +00:00
private.ll
pwr3-6x.ll
pwr7-gt-nop.ll
quadint-return.ll
r31.ll
recipest.ll [PowerPC] Avoid VSX FMA mutate when killed product reg = addend reg 2014-10-21 13:02:37 +00:00
reg-coalesce-simple.ll
reg-names.ll
reloc-align.ll
remap-crash.ll
remat-imm.ll
resolvefi-basereg.ll [PowerPC] Constrain base register in PPCRegisterInfo::resolveFrameIndex 2014-06-27 13:04:12 +00:00
resolvefi-disp.ll [PowerPC] Fix invalid displacement created by LocalStackAlloc 2014-07-11 17:19:31 +00:00
retaddr.ll
return-val-i128.ll
rlwimi2.ll
rlwimi3.ll
rlwimi-and.ll
rlwimi-commute.ll Fix the remaining TCL-style quotes found in the testsuite. This is 2012-07-02 19:09:46 +00:00
rlwimi-dyn-and.ll [PowerPC] Fix rlwimi isel when mask is not constant 2014-04-13 17:10:58 +00:00
rlwimi-keep-rsh.ll
rlwimi.ll
rlwinm2.ll
rlwinm.ll
rotl-2.ll
rotl-64.ll
rotl.ll
rounding-ops.ll [PPC] Adjust some PowerPC tests to account for presence/absence of VSX 2014-10-17 01:41:22 +00:00
rs-undef-use.ll
s000-alias-misched.ll
sdag-ppcf128.ll
sections.ll Add support for small-model PIC for PowerPC. 2014-11-12 15:16:30 +00:00
select_lt0.ll
select-cc.ll
set0-v8i16.ll
setcc_no_zext.ll Add CR-bit tracking to the PowerPC backend for i1 values 2014-02-28 00:27:01 +00:00
seteq-0.ll
shift128.ll
shl_elim.ll
shl_sext.ll
sign_ext_inreg1.ll
sj-ctr-loop.ll
sjlj.ll
small-arguments.ll
spill-nor0.ll
splat-bug.ll [PATCH] Correct type used for VADD_SPLAT optimization on PowerPC 2014-05-27 15:57:51 +00:00
split-index-tc.ll Enable splitting indexing from loads with TargetConstants 2014-09-02 16:05:23 +00:00
srl-mask.ll
stack-protector.ll
stack-realign.ll [PowerPC] Fix unwind info with dynamic stack realignment 2014-12-01 09:42:32 +00:00
std-unal-fi.ll
stdux-constuse.ll
stfiwx-2.ll
stfiwx.ll
store-load-fwd.ll
store-update.ll
structsinmem.ll
structsinregs.ll
stubs.ll
stwu8.ll
stwu-gta.ll
stwux.ll
sub-bv-types.ll
subc.ll
subreg-postra-2.ll [PowerPC] Don't use a non-allocatable register to implement the 'cc' alias 2014-12-08 22:54:22 +00:00
subreg-postra.ll [PowerPC] Don't use a non-allocatable register to implement the 'cc' alias 2014-12-08 22:54:22 +00:00
subsumes-pred-regs.ll [SDAG] Make the DAGCombine worklist not grow endlessly due to duplicate 2014-07-23 07:08:53 +00:00
svr4-redzone.ll [PowerPC] Allow stack frames without parameter save area 2014-06-23 13:47:52 +00:00
tailcall1-64.ll
tailcall1.ll
tailcallpic1.ll
tls-pic.ll Revert part of the PIC tests (TLS part) 2014-11-12 16:50:15 +00:00
tls-store2.ll [PowerPC] Replace foul hackery with real calls to __tls_get_addr 2014-11-11 20:44:09 +00:00
tls.ll
toc-load-sched-bug.ll [PPC64] Add test case for r215685. 2014-08-15 13:51:57 +00:00
trampoline.ll
unal4-std.ll [PowerPC] Enable use of lxvw4x/stxvw4x in VSX code generation 2014-10-17 15:13:38 +00:00
unal-altivec2.ll
unal-altivec-wint.ll [PowerPC] Implement PPCTargetLowering::getTgtMemIntrinsic 2014-08-13 01:15:40 +00:00
unal-altivec.ll
unaligned.ll [PowerPC] Enable use of lxvw4x/stxvw4x in VSX code generation 2014-10-17 15:13:38 +00:00
unsafe-math.ll [PowerPC] Clean up -mattr=+vsx tests to always specify -mcpu 2014-10-19 21:29:21 +00:00
unwind-dw2-g.ll Revert "Revert "DI: Fold constant arguments into a single MDString"" 2014-10-03 20:01:09 +00:00
unwind-dw2.ll
vaddsplat.ll
varargs-struct-float.ll [PowerPC] ELFv2 aggregate passing support 2014-07-21 00:13:26 +00:00
varargs.ll
vcmp-fold.ll
vec_auto_constant.ll
vec_br_cmp.ll
vec_buildvector_loadstore.ll
vec_call.ll
vec_cmp.ll [PowerPC] Fix and improve vector comparisons 2014-08-04 13:13:57 +00:00
vec_constants.ll
vec_conv.ll
vec_extload.ll
vec_fmuladd.ll
vec_fneg.ll
vec_insert.ll
vec_misaligned.ll [PowerPC 1/4] Little-endian adjustments for VSX loads/stores 2014-12-09 16:35:51 +00:00
vec_mul.ll [PowerPC] Clean up -mattr=+vsx tests to always specify -mcpu 2014-10-19 21:29:21 +00:00
vec_perf_shuffle.ll
vec_rounding.ll
vec_select.ll
vec_shift.ll
vec_shuffle_le.ll [PowerPC 1/4] Little-endian adjustments for VSX loads/stores 2014-12-09 16:35:51 +00:00
vec_shuffle.ll
vec_splat_constant.ll
vec_splat.ll
vec_sqrt.ll
vec_urem_const.ll [PowerPC] Add target triple to vec_urem_const.ll test case 2014-08-04 14:55:26 +00:00
vec_vrsave.ll
vec_zero.ll
vec-abi-align.ll [PowerPC] Enable use of lxvw4x/stxvw4x in VSX code generation 2014-10-17 15:13:38 +00:00
vector-identity-shuffle.ll
vector.ll
vperm-instcombine.ll [PPC64LE] Add test case for r210282 commit 2014-06-05 22:57:38 +00:00
vperm-lowering.ll [PPC64LE] Fix lowering of BUILD_VECTOR and SHUFFLE_VECTOR for little endian 2014-06-06 14:06:26 +00:00
vrsave-spill.ll
vrspill.ll [PowerPC] Clean up -mattr=+vsx tests to always specify -mcpu 2014-10-19 21:29:21 +00:00
vsx-args.ll [PowerPC]Update Power VSX test cases to also test fast-isel 2014-12-05 20:32:05 +00:00
vsx-div.ll [PowerPC] Add VSX builtins for vec_div 2014-11-14 12:10:40 +00:00
vsx-fma-m.ll [PowerPC]Update Power VSX test cases to also test fast-isel 2014-12-05 20:32:05 +00:00
vsx-ldst.ll [PowerPC 1/4] Little-endian adjustments for VSX loads/stores 2014-12-09 16:35:51 +00:00
vsx-minmax.ll [PowerPC] Initial VSX intrinsic support, with min/max for vector double 2014-10-31 19:19:07 +00:00
vsx-p8.ll [PowerPC]Update Power VSX test cases to also test fast-isel 2014-12-05 20:32:05 +00:00
vsx-self-copy.ll [PowerPC]Update Power VSX test cases to also test fast-isel 2014-12-05 20:32:05 +00:00
vsx-spill.ll [PowerPC]Update Power VSX test cases to also test fast-isel 2014-12-05 20:32:05 +00:00
vsx.ll [PowerPC]Update Power VSX test cases to also test fast-isel 2014-12-05 20:32:05 +00:00
vtable-reloc.ll
weak_def_can_be_hidden.ll
zero-not-run.ll