Misha Brukman d36e30e623 * Changed Bcc instructions to behave like BPcc instructions ... * BPA and BPN do not take a %cc register as a parameter * SLL/SRL/SRA{r,i}5 are there for a reason - they are ONLY 32-bit instructions * Likewise, SLL/SRL/SRAX{r,i}6 are only 64-bit * Added WRCCR{r,i} opcodes git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6655 91177308-0d34-0410-b5e6-96231b3b80d8		2003-06-06 09:52:23 +00:00
..
CBackend	Don't output explicit initializers for globals that are zero initialized	2003-06-06 07:10:24 +00:00
SparcV9	* Changed Bcc instructions to behave like BPcc instructions	2003-06-06 09:52:23 +00:00
X86	Add statistic for # machine instrs emitted	2003-06-06 04:00:05 +00:00
Makefile	X86 target builds fine now	2002-11-20 20:17:03 +00:00
MRegisterInfo.cpp	Capture more information in ctor	2002-12-28 20:34:18 +00:00
Target.td	Added the target-independent part of TableGen data.	2003-05-29 18:48:17 +00:00
TargetData.cpp	No really, you _cannot use_ getelementptr on an unsized type: that makes	2003-06-04 02:35:35 +00:00
TargetInstrInfo.cpp	Rename MachineInstrInfo -> TargetInstrInfo	2003-01-14 22:00:31 +00:00
TargetMachine.cpp	The promotion rules are the same for all targets, they are set by the C standard.	2003-04-26 19:47:36 +00:00
TargetSchedInfo.cpp	More renamings of Target/Machine*Info to Target/Target*Info	2002-12-29 03:13:05 +00:00