llvm-6502/lib/Target/R600
Patrik Hagglund 92b4f20346 Temporary fix to get rid of gcc warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182832 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-29 07:32:08 +00:00
..
InstPrinter Move passes from namespace llvm into anonymous namespaces. Sort includes while there. 2013-05-23 17:10:37 +00:00
MCTargetDesc R600: Hide symbols of implementation details. 2013-05-23 15:43:05 +00:00
TargetInfo
AMDGPU.h R600: Improve texture handling 2013-05-17 16:50:20 +00:00
AMDGPU.td
AMDGPUAsmPrinter.cpp Move passes from namespace llvm into anonymous namespaces. Sort includes while there. 2013-05-23 17:10:37 +00:00
AMDGPUAsmPrinter.h R600: Emit used GPRs count 2013-04-17 15:17:25 +00:00
AMDGPUCallingConv.td R600/SI: Add support for buffer stores v2 2013-04-05 23:31:51 +00:00
AMDGPUConvertToISA.cpp
AMDGPUFrameLowering.cpp
AMDGPUFrameLowering.h
AMDGPUIndirectAddressing.cpp
AMDGPUInstrInfo.cpp R600: Hide symbols of implementation details. 2013-05-23 15:43:05 +00:00
AMDGPUInstrInfo.h
AMDGPUInstrInfo.td Create an FPOW SDNode opcode def in the target independent .td file rather than in a specific backend. 2013-05-22 06:36:09 +00:00
AMDGPUInstructions.td R600: Swap the legality of rotl and rotr 2013-05-20 15:02:19 +00:00
AMDGPUIntrinsics.td
AMDGPUISelLowering.cpp Track IR ordering of SelectionDAG nodes 2/4. 2013-05-25 02:42:55 +00:00
AMDGPUISelLowering.h Track IR ordering of SelectionDAG nodes 2/4. 2013-05-25 02:42:55 +00:00
AMDGPUMachineFunction.cpp R600: Initialize AMDGPUMachineFunction::ShaderType to ShaderType::COMPUTE 2013-04-26 18:32:24 +00:00
AMDGPUMachineFunction.h R600/SI: Share code recording ShaderTypeAttribute between generations 2013-04-01 21:47:53 +00:00
AMDGPUMCInstLower.cpp
AMDGPUMCInstLower.h
AMDGPURegisterInfo.cpp
AMDGPURegisterInfo.h
AMDGPURegisterInfo.td
AMDGPUStructurizeCFG.cpp Move passes from namespace llvm into anonymous namespaces. Sort includes while there. 2013-05-23 17:10:37 +00:00
AMDGPUSubtarget.cpp Temporary fix to get rid of gcc warning. 2013-05-29 07:32:08 +00:00
AMDGPUSubtarget.h R600: Factorize Fetch size limit inside AMDGPUSubTarget 2013-05-17 16:49:55 +00:00
AMDGPUTargetMachine.cpp Fix a leak on the r600 backend. 2013-05-23 03:31:47 +00:00
AMDGPUTargetMachine.h Fix a leak on the r600 backend. 2013-05-23 03:31:47 +00:00
AMDIL7XXDevice.cpp
AMDIL7XXDevice.h
AMDIL.h
AMDILBase.td R600: Add FetchInst bit to instruction defs to denote vertex/tex instructions 2013-04-30 00:13:39 +00:00
AMDILCFGStructurizer.cpp R600: Hide symbols of implementation details. 2013-05-23 15:43:05 +00:00
AMDILDevice.cpp
AMDILDevice.h
AMDILDeviceInfo.cpp R600/SI: Add processor type for Hainan asic 2013-05-14 14:42:56 +00:00
AMDILDeviceInfo.h
AMDILDevices.h
AMDILEvergreenDevice.cpp
AMDILEvergreenDevice.h
AMDILInstrInfo.td
AMDILIntrinsicInfo.cpp Check that a function starts with llvm. before using GET_FUNCTION_RECOGNIZER. 2013-05-22 14:57:42 +00:00
AMDILIntrinsicInfo.h
AMDILIntrinsics.td
AMDILISelDAGToDAG.cpp Track IR ordering of SelectionDAG nodes 2/4. 2013-05-25 02:42:55 +00:00
AMDILISelLowering.cpp Track IR ordering of SelectionDAG nodes 2/4. 2013-05-25 02:42:55 +00:00
AMDILNIDevice.cpp
AMDILNIDevice.h
AMDILRegisterInfo.td
AMDILSIDevice.cpp
AMDILSIDevice.h
CMakeLists.txt R600: Improve texture handling 2013-05-17 16:50:20 +00:00
LLVMBuild.txt
Makefile
Processors.td R600/SI: Add processor type for Hainan asic 2013-05-14 14:42:56 +00:00
R600ControlFlowFinalizer.cpp R600: Fix R600ControlFlowFinalizer not considering VTX_READ 128 bit dst reg 2013-05-23 18:26:42 +00:00
R600Defines.h R600: Relax some vector constraints on Dot4. 2013-05-17 16:50:32 +00:00
R600EmitClauseMarkers.cpp Move passes from namespace llvm into anonymous namespaces. Sort includes while there. 2013-05-23 17:10:37 +00:00
R600ExpandSpecialInstrs.cpp Fix warning in non-assert build. 2013-05-22 01:29:38 +00:00
R600InstrInfo.cpp Move passes from namespace llvm into anonymous namespaces. Sort includes while there. 2013-05-23 17:10:37 +00:00
R600InstrInfo.h R600: Relax some vector constraints on Dot4. 2013-05-17 16:50:32 +00:00
R600Instructions.td R600: Swap the legality of rotl and rotr 2013-05-20 15:02:19 +00:00
R600Intrinsics.td R600: Improve texture handling 2013-05-17 16:50:20 +00:00
R600ISelLowering.cpp Track IR ordering of SelectionDAG nodes 2/4. 2013-05-25 02:42:55 +00:00
R600ISelLowering.h Track IR ordering of SelectionDAG nodes 2/4. 2013-05-25 02:42:55 +00:00
R600MachineFunctionInfo.cpp R600/SI: Share code recording ShaderTypeAttribute between generations 2013-04-01 21:47:53 +00:00
R600MachineFunctionInfo.h Move passes from namespace llvm into anonymous namespaces. Sort includes while there. 2013-05-23 17:10:37 +00:00
R600MachineScheduler.cpp Move passes from namespace llvm into anonymous namespaces. Sort includes while there. 2013-05-23 17:10:37 +00:00
R600MachineScheduler.h Move passes from namespace llvm into anonymous namespaces. Sort includes while there. 2013-05-23 17:10:37 +00:00
R600Packetizer.cpp Move passes from namespace llvm into anonymous namespaces. Sort includes while there. 2013-05-23 17:10:37 +00:00
R600RegisterInfo.cpp R600: Use bottom up scheduling algorithm 2013-05-17 16:50:56 +00:00
R600RegisterInfo.h R600: Use bottom up scheduling algorithm 2013-05-17 16:50:56 +00:00
R600RegisterInfo.td R600: Rename 128 bit registers. 2013-05-17 16:50:09 +00:00
R600Schedule.td R600: Rework Scheduling to handle difference between VLIW4 and VLIW5 chips 2013-04-30 00:14:17 +00:00
R600TextureIntrinsicsReplacer.cpp Move passes from namespace llvm into anonymous namespaces. Sort includes while there. 2013-05-23 17:10:37 +00:00
SIAnnotateControlFlow.cpp
SIDefines.h R600/SI: Emit config values in register value pairs. 2013-04-15 17:51:35 +00:00
SIInsertWaits.cpp
SIInstrFormats.td R600/SI: Use the same names for VOP3 operands and encoding fields 2013-05-20 15:02:08 +00:00
SIInstrInfo.cpp R600/SI: dynamical figure out the reg class of MIMG 2013-04-10 08:39:16 +00:00
SIInstrInfo.h R600/SI: adjust writemask to only the used components 2013-04-10 08:39:08 +00:00
SIInstrInfo.td R600/SI: Use a multiclass for MUBUF_Load_Helper 2013-05-20 15:02:31 +00:00
SIInstructions.td R600/SI: Use a multiclass for MUBUF_Load_Helper 2013-05-20 15:02:31 +00:00
SIIntrinsics.td R600/SI: Add intrinsic for MIMG IMAGE_GET_RESINFO opcode 2013-05-06 23:02:19 +00:00
SIISelLowering.cpp Track IR ordering of SelectionDAG nodes 2/4. 2013-05-25 02:42:55 +00:00
SIISelLowering.h Track IR ordering of SelectionDAG nodes 2/4. 2013-05-25 02:42:55 +00:00
SILowerControlFlow.cpp R600/SI: replace WQM intrinsic 2013-03-26 14:03:50 +00:00
SIMachineFunctionInfo.cpp R600/SI: Share code recording ShaderTypeAttribute between generations 2013-04-01 21:47:53 +00:00
SIMachineFunctionInfo.h R600/SI: Share code recording ShaderTypeAttribute between generations 2013-04-01 21:47:53 +00:00
SIRegisterInfo.cpp R600/SI: switch back to RegPressure scheduling 2013-03-26 14:04:02 +00:00
SIRegisterInfo.h R600/SI: switch back to RegPressure scheduling 2013-03-26 14:04:02 +00:00
SIRegisterInfo.td R600/SI: dynamical figure out the reg class of MIMG 2013-04-10 08:39:16 +00:00
SISchedule.td