Marek Olsak eca8933d58 R600/SI: Set 20-bit immediate byte offset for SMRD on VI ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223614 91177308-0d34-0410-b5e6-96231b3b80d8		2014-12-07 17:17:38 +00:00
..
AsmParser	R600/SI: Start implementing an assembler	2014-11-14 14:08:00 +00:00
InstPrinter	R600/SI: Change mubuf offsets to print as decimal	2014-12-03 03:12:13 +00:00
MCTargetDesc	R600/SI: Restore PrivateGlobalPrefix to the default ELF value of ".L"	2014-12-06 05:34:34 +00:00
TargetInfo
AMDGPU.h	R600/SI: Add SIFoldOperands pass	2014-11-21 22:06:37 +00:00
AMDGPU.td	R600/SI: Add VI instructions	2014-12-07 12:18:57 +00:00
AMDGPUAlwaysInlinePass.cpp
AMDGPUAsmPrinter.cpp	Silencing a 32-bit implicit conversion warning in MSVC; NFC.	2014-12-03 14:39:58 +00:00
AMDGPUAsmPrinter.h	R600/SI: Emit amd_kernel_code_t header for AMDGPU environment	2014-12-02 22:00:07 +00:00
AMDGPUCallingConv.td
AMDGPUFrameLowering.cpp
AMDGPUFrameLowering.h
AMDGPUInstrInfo.cpp	R600/SI: Add VI instructions	2014-12-07 12:18:57 +00:00
AMDGPUInstrInfo.h
AMDGPUInstrInfo.td	R600/SI: Combine min3/max3 instructions	2014-11-14 20:08:52 +00:00
AMDGPUInstructions.td	R600/SI: Start implementing an assembler	2014-11-14 14:08:00 +00:00
AMDGPUIntrinsicInfo.cpp
AMDGPUIntrinsicInfo.h
AMDGPUIntrinsics.td
AMDGPUISelDAGToDAG.cpp	R600/SI: Set the ATC bit on all resource descriptors for the HSA runtime	2014-12-02 17:05:41 +00:00
AMDGPUISelLowering.cpp	R600/SI: Update instruction conversions for VI	2014-12-07 12:19:03 +00:00
AMDGPUISelLowering.h	R600: Factor i64 UDIVREM lowering into its own fuction	2014-11-15 01:07:53 +00:00
AMDGPUMachineFunction.cpp
AMDGPUMachineFunction.h
AMDGPUMCInstLower.cpp	R600/SI: Add VI instructions	2014-12-07 12:18:57 +00:00
AMDGPUMCInstLower.h	R600/SI: Add VI instructions	2014-12-07 12:18:57 +00:00
AMDGPUPromoteAlloca.cpp
AMDGPURegisterInfo.cpp	R600/SI: Enable inline assembly	2014-12-03 04:08:00 +00:00
AMDGPURegisterInfo.h
AMDGPURegisterInfo.td
AMDGPUSubtarget.cpp	R600/SI: Emit amd_kernel_code_t header for AMDGPU environment	2014-12-02 22:00:07 +00:00
AMDGPUSubtarget.h	R600/SI: Add VI instructions	2014-12-07 12:18:57 +00:00
AMDGPUTargetMachine.cpp	R600/SI: Move SIInsertWaits into AMDGPUPassConfig::addPreSched2()	2014-12-03 18:27:08 +00:00
AMDGPUTargetMachine.h
AMDGPUTargetTransformInfo.cpp
AMDILCFGStructurizer.cpp
AMDKernelCodeT.h	R600/SI: Emit amd_kernel_code_t header for AMDGPU environment	2014-12-02 22:00:07 +00:00
CaymanInstructions.td
CIInstructions.td	R600/SI: Add VI instructions	2014-12-07 12:18:57 +00:00
CMakeLists.txt	R600/SI: Add SIFoldOperands pass	2014-11-21 22:06:37 +00:00
EvergreenInstructions.td
LLVMBuild.txt	R600/SI: Start implementing an assembler	2014-11-14 14:08:00 +00:00
Makefile	R600/SI: Start implementing an assembler	2014-11-14 14:08:00 +00:00
Processors.td	R600/SI: Add VI instructions	2014-12-07 12:18:57 +00:00
R600ClauseMergePass.cpp
R600ControlFlowFinalizer.cpp
R600Defines.h
R600EmitClauseMarkers.cpp
R600ExpandSpecialInstrs.cpp
R600InstrFormats.td	R600/SI: Start implementing an assembler	2014-11-14 14:08:00 +00:00
R600InstrInfo.cpp
R600InstrInfo.h
R600Instructions.td	Replace neverHasSideEffects=1 with hasSideEffects=0 in all .td files.	2014-11-26 00:46:26 +00:00
R600Intrinsics.td
R600ISelLowering.cpp	R600/SI: Use ZeroOrNegativeOneBooleanContent	2014-11-26 21:23:15 +00:00
R600ISelLowering.h
R600MachineFunctionInfo.cpp
R600MachineFunctionInfo.h
R600MachineScheduler.cpp
R600MachineScheduler.h
R600OptimizeVectorRegisters.cpp
R600Packetizer.cpp
R600RegisterInfo.cpp
R600RegisterInfo.h
R600RegisterInfo.td
R600Schedule.td
R600TextureIntrinsicsReplacer.cpp
R700Instructions.td
SIAnnotateControlFlow.cpp
SIDefines.h	R600/SI: Move more information into SIProgramInfo struct	2014-12-02 21:28:53 +00:00
SIFixSGPRCopies.cpp	R600/SI: Fix SIFixSGPRCopies for copies to physical registers	2014-12-03 05:22:39 +00:00
SIFixSGPRLiveRanges.cpp
SIFoldOperands.cpp	R600/SI: Add SIFoldOperands pass	2014-11-21 22:06:37 +00:00
SIInsertWaits.cpp
SIInstrFormats.td	R600/SI: Add VI instructions	2014-12-07 12:18:57 +00:00
SIInstrInfo.cpp	R600/SI: Set 20-bit immediate byte offset for SMRD on VI	2014-12-07 17:17:38 +00:00
SIInstrInfo.h	R600/SI: Set 20-bit immediate byte offset for SMRD on VI	2014-12-07 17:17:38 +00:00
SIInstrInfo.td	R600/SI: Set 20-bit immediate byte offset for SMRD on VI	2014-12-07 17:17:38 +00:00
SIInstructions.td	R600/SI: Set 20-bit immediate byte offset for SMRD on VI	2014-12-07 17:17:38 +00:00
SIIntrinsics.td
SIISelLowering.cpp	R600/SI: Set 20-bit immediate byte offset for SMRD on VI	2014-12-07 17:17:38 +00:00
SIISelLowering.h	R600/SI: Combine min3/max3 instructions	2014-11-14 20:08:52 +00:00
SILoadStoreOptimizer.cpp	R600/SI: Fix live range error hidden by SIFoldOperands	2014-12-03 05:22:29 +00:00
SILowerControlFlow.cpp	Removing a variable that is initialized but never read. The original author has been alerted to the warning, in case this variable is meant to be used. Fixes -Werror builds in the meantime.	2014-11-24 14:03:16 +00:00
SILowerI1Copies.cpp	R600/SI: Remove i1 pseudo VALU ops	2014-12-03 05:22:35 +00:00
SIMachineFunctionInfo.cpp
SIMachineFunctionInfo.h
SIRegisterInfo.cpp	R600/SI: Fix allocating flat_scr_lo / flat_scr_hi	2014-11-25 07:53:06 +00:00
SIRegisterInfo.h
SIRegisterInfo.td	R600/SI: Fix assembly names for exec_hi and exec_lo	2014-11-14 14:08:04 +00:00
SISchedule.td
SIShrinkInstructions.cpp
SITypeRewriter.cpp
VIInstrFormats.td	R600/SI: Add VI instructions	2014-12-07 12:18:57 +00:00
VIInstructions.td	R600/SI: Set 20-bit immediate byte offset for SMRD on VI	2014-12-07 17:17:38 +00:00