llvm-6502/test/MC/AArch64
Kevin Qin 7582d8d76f [AArch64 NEON] Accept both #0.0 and #0 for comparing with floating point zero in asm parser.
For FCMEQ, FCMGE, FCMGT, FCMLE and FCMLT, floating point zero will be
printed as #0.0 instead of #0. To support the history codes using #0,
we consider to let asm parser accept both #0.0 and #0.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199621 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-20 02:14:05 +00:00
..
adrp-relocation.s
basic-a64-diagnostics.s
basic-a64-instructions.s
basic-pic.s Convert a llc -filetype=obj test into a llvm-mc test. 2013-10-28 20:40:20 +00:00
elf-extern.s
elf-globaladdress.ll
elf-objdump.s
elf-reloc-addend.s
elf-reloc-addsubimm.s
elf-reloc-condbr.s
elf-reloc-ldrlit.s
elf-reloc-ldstunsimm.s
elf-reloc-movw.s
elf-reloc-pcreladdressing.s
elf-reloc-tstb.s
elf-reloc-uncondbrimm.s
gicv3-regs-diagnostics.s
gicv3-regs.s
inline-asm-modifiers.s
jump-table.s
lit.local.cfg
mapping-across-sections.s
mapping-within-section.s
neon-2velem.s
neon-3vdiff.s implement MC layer of AArch64 neon instruction PMULL and PMULL2 with 128 bit integer. 2013-11-19 01:40:25 +00:00
neon-aba-abd.s
neon-across.s
neon-add-pairwise.s
neon-add-sub-instructions.s
neon-bitwise-instructions.s
neon-compare-instructions.s [AArch64 NEON] Accept both #0.0 and #0 for comparing with floating point zero in asm parser. 2014-01-20 02:14:05 +00:00
neon-crypto.s Add predicate for AArch64 crypto instructions. 2013-11-19 01:38:31 +00:00
neon-diagnostics.s [AArch64 NEON] Accept both #0.0 and #0 for comparing with floating point zero in asm parser. 2014-01-20 02:14:05 +00:00
neon-extract.s Implement AArch64 Neon instruction set Bitwise Extract. 2013-11-06 02:25:49 +00:00
neon-facge-facgt.s
neon-frsqrt-frecp.s
neon-halving-add-sub.s AArch64: add initial NEON support 2013-08-01 09:20:35 +00:00
neon-max-min-pairwise.s
neon-max-min.s
neon-mla-mls-instructions.s
neon-mov.s
neon-mul-div-instructions.s
neon-perm.s Implement AArch64 Neon instruction set Perm. 2013-11-06 03:35:27 +00:00
neon-rounding-halving-add.s AArch64: add initial NEON support 2013-08-01 09:20:35 +00:00
neon-rounding-shift.s
neon-saturating-add-sub.s
neon-saturating-rounding-shift.s
neon-saturating-shift.s
neon-scalar-abs.s [AArch64] Add support for NEON scalar floating-point absolute difference. 2013-11-27 01:45:58 +00:00
neon-scalar-add-sub.s
neon-scalar-by-elem-mla.s [AArch64] Implemented AdvSIMD scalar x indexed element format and AdvSIMD scalar 2013-11-12 19:13:08 +00:00
neon-scalar-by-elem-mul.s [AArch64] Implemented AdvSIMD scalar x indexed element format and AdvSIMD scalar 2013-11-12 19:13:08 +00:00
neon-scalar-by-elem-saturating-mla.s [AArch64] Implemented AdvSIMD scalar x indexed element format and AdvSIMD scalar 2013-11-12 19:13:08 +00:00
neon-scalar-by-elem-saturating-mul.s [AArch64] Implemented AdvSIMD scalar x indexed element format and AdvSIMD scalar 2013-11-12 19:13:08 +00:00
neon-scalar-compare.s
neon-scalar-cvt.s [AArch64] Add support for NEON scalar floating-point to integer convert 2013-11-26 22:17:37 +00:00
neon-scalar-dup.s Implemented Neon scalar vdup_lane intrinsics. 2013-11-21 08:16:15 +00:00
neon-scalar-extract-narrow.s
neon-scalar-fp-compare.s [AArch64 NEON] Accept both #0.0 and #0 for comparing with floating point zero in asm parser. 2014-01-20 02:14:05 +00:00
neon-scalar-mul.s
neon-scalar-neg.s
neon-scalar-recip.s
neon-scalar-reduce-pairwise.s
neon-scalar-rounding-shift.s
neon-scalar-saturating-add-sub.s
neon-scalar-saturating-rounding-shift.s
neon-scalar-saturating-shift.s
neon-scalar-shift-imm.s
neon-scalar-shift.s
neon-shift-left-long.s
neon-shift.s
neon-simd-copy.s [AArch64 NEON]Add mov alias for simd copy instructions. 2013-11-18 09:20:32 +00:00
neon-simd-ldst-multi-elem.s Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem). 2013-10-10 17:00:52 +00:00
neon-simd-ldst-one-elem.s Implement AArch64 neon instructions class SIMD lsone and SIMD lone-post. 2013-11-19 02:17:05 +00:00
neon-simd-misc.s Add test case for AArch64 NEON instruction set misc. 2013-11-14 06:45:17 +00:00
neon-simd-post-ldst-multi-elem.s Implement AArch64 post-index vector load/store multiple N-element structure class SIMD(lselem-post). 2013-11-05 03:39:32 +00:00
neon-simd-shift.s [AArch64] Implemented AdvSIMD scalar x indexed element format and AdvSIMD scalar 2013-11-12 19:13:08 +00:00
neon-sxtl.s [AArch64][NEON] Added SXTL and SXTL2 instruction aliases 2014-01-03 19:20:31 +00:00
neon-tbl.s Implement AArch64 NEON instruction set AdvSIMD (table). 2013-11-14 01:57:32 +00:00
neon-uxtl.s [AArch64][NEON] Added UXTL and UXTL2 instruction aliases 2014-01-08 21:02:13 +00:00
noneon-diagnostics.s
tls-relocs.s
trace-regs-diagnostics.s
trace-regs.s AArch64: implement ETMv4 trace system registers. 2013-04-03 12:31:29 +00:00