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AsmParser
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This patch introduces RegisterOperand class into Mips FPU instruction definitions and adds dedicated parser methods to MipsAsmParser. It is the first in a series of patches that should fix the problems with parsing Mips FPU instructions and optimize the code in MipsAsmParser.
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2013-06-24 10:05:34 +00:00 |
Disassembler
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[Mips Disassembler] Have the DecodeCCRRegisterClass function use the getReg
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2013-06-26 22:23:32 +00:00 |
InstPrinter
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MCTargetDesc
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Mips ELF: Mark object file as ABI compliant
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2013-06-18 19:47:15 +00:00 |
TargetInfo
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CMakeLists.txt
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Fix CMakeLists.
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2013-06-11 22:36:30 +00:00 |
LLVMBuild.txt
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Makefile
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MicroMipsInstrFormats.td
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[mips] Add definitions of micromips load and store instructions.
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2013-04-25 01:21:25 +00:00 |
MicroMipsInstrInfo.td
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Mips td file formatting: white space and long lines
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2013-05-16 20:08:49 +00:00 |
Mips16FrameLowering.cpp
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Use pointers to the MCAsmInfo and MCRegInfo.
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2013-06-18 07:20:20 +00:00 |
Mips16FrameLowering.h
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Mips16HardFloat.cpp
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Patch number 2 for mips16/32 floating point interoperability stubs.
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2013-05-16 02:17:42 +00:00 |
Mips16HardFloat.h
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Checkin in of first of several patches to finish implementation of
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2013-05-10 22:25:39 +00:00 |
Mips16InstrFormats.td
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Mips td file formatting: white space and long lines
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2013-05-16 20:08:49 +00:00 |
Mips16InstrInfo.cpp
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Don't cache the instruction and register info from the TargetMachine, because
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2013-06-07 07:04:14 +00:00 |
Mips16InstrInfo.h
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[mips] Rename functions. No functionality changes.
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2013-05-13 17:43:19 +00:00 |
Mips16InstrInfo.td
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Mips16ISelDAGToDAG.cpp
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Access the TargetLoweringInfo from the TargetMachine object instead of caching it. The TLI may change between functions. No functionality change.
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2013-06-19 21:36:55 +00:00 |
Mips16ISelDAGToDAG.h
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Track IR ordering of SelectionDAG nodes 2/4.
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2013-05-25 02:42:55 +00:00 |
Mips16ISelLowering.cpp
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Mips: Remove global set.
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2013-06-13 19:06:52 +00:00 |
Mips16ISelLowering.h
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Mips: Remove global set.
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2013-06-13 19:06:52 +00:00 |
Mips16RegisterInfo.cpp
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Don't cache the instruction and register info from the TargetMachine, because
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2013-06-07 07:04:14 +00:00 |
Mips16RegisterInfo.h
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Don't cache the instruction and register info from the TargetMachine, because
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2013-06-07 07:04:14 +00:00 |
Mips64InstrInfo.td
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[mips] Add new InstrItinClasses for move from/to coprocessor instructions and
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2013-07-02 00:00:02 +00:00 |
Mips.h
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[mips] Add an IR transformation pass that optimizes calls to sqrt.
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2013-06-11 22:21:44 +00:00 |
Mips.td
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MipsAnalyzeImmediate.cpp
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Replace Count{Leading,Trailing}Zeros_{32,64} with count{Leading,Trailing}Zeros.
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2013-05-24 22:23:49 +00:00 |
MipsAnalyzeImmediate.h
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MipsAsmPrinter.cpp
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[mips] Do not emit ".option pic0" if target is mips64.
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2013-06-26 19:08:49 +00:00 |
MipsAsmPrinter.h
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DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineInstrs
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2013-06-16 20:34:27 +00:00 |
MipsCallingConv.td
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Mips td file formatting: white space and long lines
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2013-05-16 20:08:49 +00:00 |
MipsCodeEmitter.cpp
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Don't cache the instruction and register info from the TargetMachine, because
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2013-06-07 07:04:14 +00:00 |
MipsCondMov.td
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MipsConstantIslandPass.cpp
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Don't cache the instruction and register info from the TargetMachine, because
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2013-06-07 07:04:14 +00:00 |
MipsDelaySlotFiller.cpp
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Use SmallVectorImpl::iterator/const_iterator instead of SmallVector to avoid specifying the vector size.
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2013-07-03 15:07:05 +00:00 |
MipsDSPInstrFormats.td
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[mips] DSP-ASE move from HI/LO register instructions.
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2013-04-18 00:52:44 +00:00 |
MipsDSPInstrInfo.td
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[mips] Split the DSP control register and define one register for each field of
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2013-05-03 18:37:49 +00:00 |
MipsFrameLowering.cpp
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MipsFrameLowering.h
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MipsInstrFormats.td
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[mips] Trap on integer division by zero.
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2013-05-20 18:07:43 +00:00 |
MipsInstrFPU.td
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[mips] Add new InstrItinClasses for move from/to coprocessor instructions and
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2013-07-02 00:00:02 +00:00 |
MipsInstrInfo.cpp
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DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineInstrs
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2013-06-16 20:34:27 +00:00 |
MipsInstrInfo.h
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DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineInstrs
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2013-06-16 20:34:27 +00:00 |
MipsInstrInfo.td
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[mips] Add new InstrItinClasses for move from/to coprocessor instructions and
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2013-07-02 00:00:02 +00:00 |
MipsISelDAGToDAG.cpp
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Access the TargetLoweringInfo from the TargetMachine object instead of caching it. The TLI may change between functions. No functionality change.
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2013-06-19 21:36:55 +00:00 |
MipsISelDAGToDAG.h
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MipsISelLowering.cpp
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Remove the EXCEPTIONADDR, EHSELECTION, and LSDAADDR ISD opcodes.
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2013-07-04 13:54:20 +00:00 |
MipsISelLowering.h
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Use SmallVectorImpl::iterator/const_iterator instead of SmallVector to avoid specifying the vector size.
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2013-07-03 15:07:05 +00:00 |
MipsJITInfo.cpp
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MipsJITInfo.h
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MipsLongBranch.cpp
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Use SmallVectorImpl::iterator/const_iterator instead of SmallVector to avoid specifying the vector size.
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2013-07-04 01:31:24 +00:00 |
MipsMachineFunction.cpp
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MipsMachineFunction.h
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MipsMCInstLower.cpp
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MipsMCInstLower.h
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MipsModuleISelDAGToDAG.cpp
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MipsModuleISelDAGToDAG.h
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MipsOptimizeMathLibCalls.cpp
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[mips] Add an IR transformation pass that optimizes calls to sqrt.
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2013-06-11 22:21:44 +00:00 |
MipsOs16.cpp
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80 columns.
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2013-04-22 20:13:37 +00:00 |
MipsOs16.h
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MipsRegisterInfo.cpp
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Checkin in of first of several patches to finish implementation of
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2013-05-10 22:25:39 +00:00 |
MipsRegisterInfo.h
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Checkin in of first of several patches to finish implementation of
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2013-05-10 22:25:39 +00:00 |
MipsRegisterInfo.td
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[mips] Increase the number of floating point control registers available to 32.
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2013-07-01 20:31:44 +00:00 |
MipsRelocations.h
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MipsSchedule.td
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[mips] Add new InstrItinClasses for move from/to coprocessor instructions and
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2013-07-02 00:00:02 +00:00 |
MipsSEFrameLowering.cpp
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Use pointers to the MCAsmInfo and MCRegInfo.
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2013-06-18 07:20:20 +00:00 |
MipsSEFrameLowering.h
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MipsSEInstrInfo.cpp
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[mips] Use function TargetInstrInfo::getRegClass.
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2013-06-11 18:48:16 +00:00 |
MipsSEInstrInfo.h
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[mips] Use function TargetInstrInfo::getRegClass.
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2013-06-11 18:48:16 +00:00 |
MipsSEISelDAGToDAG.cpp
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Access the TargetLoweringInfo from the TargetMachine object instead of caching it. The TLI may change between functions. No functionality change.
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2013-06-19 21:36:55 +00:00 |
MipsSEISelDAGToDAG.h
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Track IR ordering of SelectionDAG nodes 2/4.
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2013-05-25 02:42:55 +00:00 |
MipsSEISelLowering.cpp
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[mips] Improve code generation for constant multiplication using shifts, adds and
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2013-06-26 18:48:17 +00:00 |
MipsSEISelLowering.h
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[mips] Move MipsTargetLowering::lowerINTRINSIC_W_CHAIN and
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2013-04-13 02:13:30 +00:00 |
MipsSelectionDAGInfo.cpp
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MipsSelectionDAGInfo.h
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MipsSERegisterInfo.cpp
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Don't cache the instruction and register info from the TargetMachine, because
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2013-06-07 07:04:14 +00:00 |
MipsSERegisterInfo.h
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Don't cache the instruction and register info from the TargetMachine, because
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2013-06-07 07:04:14 +00:00 |
MipsSubtarget.cpp
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Checkin in of first of several patches to finish implementation of
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2013-05-10 22:25:39 +00:00 |
MipsSubtarget.h
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Checkin in of first of several patches to finish implementation of
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2013-05-10 22:25:39 +00:00 |
MipsTargetMachine.cpp
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[mips] Add an IR transformation pass that optimizes calls to sqrt.
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2013-06-11 22:21:44 +00:00 |
MipsTargetMachine.h
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MipsTargetObjectFile.cpp
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MipsTargetObjectFile.h
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