Evan Cheng f9f1da17f8 - Update register allocation hint after coalescing. This is done by the target since the hint is target dependent. This is important for ARM register pair hints. ... - Register allocator should resolve the second part of the hint (register number) before passing it to the target since it knows virtual register to physical register mapping. - More fixes to get ARM load / store double word working. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73671 91177308-0d34-0410-b5e6-96231b3b80d8		2009-06-18 02:04:01 +00:00
..
DarwinTargetAsmInfo.h	Tidy up #includes, deleting a bunch of unnecessary #includes.	2009-01-05 17:59:02 +00:00
ELFTargetAsmInfo.h	Do not propagate ELF-specific stuff (data.rel) into other targets. This simplifies code and also ensures correctness.	2009-03-30 15:27:43 +00:00
SubtargetFeature.h	Propagate CPU string out of SubtargetFeatures	2009-05-23 19:50:50 +00:00
Target.td	Revert 72707 and 72709, for the moment.	2009-06-02 03:12:52 +00:00
TargetAsmInfo.h	Add directive to declare external globals.	2009-04-29 08:23:18 +00:00
TargetCallingConv.td	Use CallConvLower.h and TableGen descriptions of the calling conventions	2009-04-17 19:07:39 +00:00
TargetData.h	Clarify a comment.	2009-05-12 17:08:34 +00:00
TargetELFWriterInfo.h	Introduce new BinaryObject (blob) class, ELF Writer modified to use it. BinaryObject.h by Aaron Gray	2009-06-14 07:53:21 +00:00
TargetFrameInfo.h	Tidy up #includes, deleting a bunch of unnecessary #includes.	2009-01-05 17:59:02 +00:00
TargetInstrDesc.h	Add new TargetInstrDesc::hasImplicitUseOfPhysReg and	2009-04-12 07:26:51 +00:00
TargetInstrInfo.h	Move getInstrOperandRegClass from the scheduler to TargetInstrInfo.	2009-05-05 00:30:09 +00:00
TargetInstrItineraries.h	Implement ComputeLatency for MachineInstr ScheduleDAGs. Factor	2008-11-21 00:12:10 +00:00
TargetIntrinsicInfo.h	Added support to have TableGen provide information if an intrinsic (core	2009-02-24 23:17:49 +00:00
TargetJITInfo.h	First patch in the direction of splitting MachineCodeEmitter in two subclasses:	2009-05-30 20:51:52 +00:00
TargetLowering.h	Change IndexedModeAction representation.	2009-06-09 00:19:10 +00:00
TargetMachine.h	Address more comments :)	2009-06-15 22:08:48 +00:00
TargetMachineRegistry.h	Registry.h should not depend on CommandLine.h.	2009-01-16 07:02:28 +00:00
TargetMachOWriterInfo.h
TargetOptions.h	The attached patches implement most of the ARM AAPCS-VFP hard float	2009-06-08 22:53:56 +00:00
TargetRegisterInfo.h	- Update register allocation hint after coalescing. This is done by the target since the hint is target dependent. This is important for ARM register pair hints.	2009-06-18 02:04:01 +00:00
TargetSchedule.td	Move target independent td files from lib/Target/ to include/llvm/Target so they can be distributed along with the header files.	2008-11-24 07:34:46 +00:00
TargetSelect.h	Add a utility header that makes it easy to link in the right set	2009-06-17 16:42:01 +00:00
TargetSelectionDAG.td	Make IntInits and ListInits typed. This helps deduce types of !if and	2009-06-08 20:23:18 +00:00
TargetSubtarget.h	Add initial support for back-scheduling address computations,	2008-12-16 03:35:01 +00:00