llvm-6502/lib/Target/R600
Tom Stellard e5839d0fc9 R600: Add AR_X to the R600_TReg_X register class.
NOTE: This is a candidate for the Mesa stable branch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175519 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19 15:22:47 +00:00
..
InstPrinter R600/SI: Fix int_SI_fs_interp_constant 2013-02-14 19:03:25 +00:00
MCTargetDesc Use LLVM_DELETED_FUNCTION rather than '// do not implement' comments. 2013-02-18 23:11:17 +00:00
TargetInfo
AMDGPU.h R600/SI: cleanup literal handling v3 2013-02-16 11:28:22 +00:00
AMDGPU.td
AMDGPUAsmPrinter.cpp R600/SI: cleanup literal handling v3 2013-02-16 11:28:22 +00:00
AMDGPUAsmPrinter.h
AMDGPUConvertToISA.cpp
AMDGPUFrameLowering.cpp R600: Support for indirect addressing v4 2013-02-06 17:32:29 +00:00
AMDGPUFrameLowering.h R600: Support for indirect addressing v4 2013-02-06 17:32:29 +00:00
AMDGPUIndirectAddressing.cpp R600: Fix tracking of implicit defs in the IndirectAddressing pass 2013-02-19 15:22:42 +00:00
AMDGPUInstrInfo.cpp R600: Support for indirect addressing v4 2013-02-06 17:32:29 +00:00
AMDGPUInstrInfo.h R600: Support for indirect addressing v4 2013-02-06 17:32:29 +00:00
AMDGPUInstrInfo.td R600: Support for indirect addressing v4 2013-02-06 17:32:29 +00:00
AMDGPUInstructions.td R600/SI: Add basic support for more integer vector types. 2013-02-07 17:02:09 +00:00
AMDGPUIntrinsics.td
AMDGPUISelLowering.cpp R600/SI: Use MULADD_IEEE/V_MAD_F32 instruction for mad pattern 2013-02-18 14:11:28 +00:00
AMDGPUISelLowering.h R600/SI: Use MULADD_IEEE/V_MAD_F32 instruction for mad pattern 2013-02-18 14:11:28 +00:00
AMDGPUMCInstLower.cpp
AMDGPUMCInstLower.h
AMDGPURegisterInfo.cpp R600: Consolidate sub register indices. 2013-02-07 14:02:37 +00:00
AMDGPURegisterInfo.h R600: Support for indirect addressing v4 2013-02-06 17:32:29 +00:00
AMDGPURegisterInfo.td R600: Consolidate sub register indices. 2013-02-07 14:02:37 +00:00
AMDGPUStructurizeCFG.cpp R600/structurizer: improve inverting conditions 2013-02-16 11:27:50 +00:00
AMDGPUSubtarget.cpp
AMDGPUSubtarget.h
AMDGPUTargetMachine.cpp R600/SI: cleanup literal handling v3 2013-02-16 11:28:22 +00:00
AMDGPUTargetMachine.h R600: Support for indirect addressing v4 2013-02-06 17:32:29 +00:00
AMDIL7XXDevice.cpp
AMDIL7XXDevice.h
AMDIL.h
AMDILBase.td
AMDILCFGStructurizer.cpp
AMDILDevice.cpp
AMDILDevice.h
AMDILDeviceInfo.cpp
AMDILDeviceInfo.h
AMDILDevices.h
AMDILEvergreenDevice.cpp
AMDILEvergreenDevice.h
AMDILInstrInfo.td R600/SI: Use MULADD_IEEE/V_MAD_F32 instruction for mad pattern 2013-02-18 14:11:28 +00:00
AMDILIntrinsicInfo.cpp
AMDILIntrinsicInfo.h
AMDILIntrinsics.td R600/SI: Use MULADD_IEEE/V_MAD_F32 instruction for mad pattern 2013-02-18 14:11:28 +00:00
AMDILISelDAGToDAG.cpp R600: Do not fold single instruction with more that 3 kcache read 2013-02-14 16:57:19 +00:00
AMDILISelLowering.cpp R600/SI: Use MULADD_IEEE/V_MAD_F32 instruction for mad pattern 2013-02-18 14:11:28 +00:00
AMDILNIDevice.cpp
AMDILNIDevice.h
AMDILPeepholeOptimizer.cpp
AMDILRegisterInfo.td
AMDILSIDevice.cpp
AMDILSIDevice.h
CMakeLists.txt Target/R600/CMakeLists.txt: Prune SILowerLiteralConstants.cpp corresponding to r175354. 2013-02-16 15:30:28 +00:00
LLVMBuild.txt
Makefile
Processors.td R600: Add an explicit default processor 2013-02-07 19:39:34 +00:00
R600Defines.h R600: Support for indirect addressing v4 2013-02-06 17:32:29 +00:00
R600ExpandSpecialInstrs.cpp
R600InstrInfo.cpp R600: Support for indirect addressing v4 2013-02-06 17:32:29 +00:00
R600InstrInfo.h R600: Support for indirect addressing v4 2013-02-06 17:32:29 +00:00
R600Instructions.td R600/SI: Use MULADD_IEEE/V_MAD_F32 instruction for mad pattern 2013-02-18 14:11:28 +00:00
R600Intrinsics.td R600: Support for TBO 2013-02-18 14:11:19 +00:00
R600ISelLowering.cpp R600: Fix scheduler crash caused by invalid MachinePointerInfo 2013-02-19 15:22:44 +00:00
R600ISelLowering.h R600: Support for indirect addressing v4 2013-02-06 17:32:29 +00:00
R600LowerConstCopy.cpp R600: Do not fold single instruction with more that 3 kcache read 2013-02-14 16:57:19 +00:00
R600MachineFunctionInfo.cpp
R600MachineFunctionInfo.h R600: Support for indirect addressing v4 2013-02-06 17:32:29 +00:00
R600RegisterInfo.cpp R600: Mark all members of the TRegMem register class as reserved 2013-02-19 15:22:45 +00:00
R600RegisterInfo.h
R600RegisterInfo.td R600: Add AR_X to the R600_TReg_X register class. 2013-02-19 15:22:47 +00:00
R600Schedule.td
SIAnnotateControlFlow.cpp R600/SI: Check for empty stack in SIAnnotateControlFlow::isTopOfStack 2013-02-14 08:00:33 +00:00
SIAssignInterpRegs.cpp
SIInsertWaits.cpp
SIInstrFormats.td R600/SI: nuke SReg_1 v3 2013-02-16 11:28:30 +00:00
SIInstrInfo.cpp R600/SI: cleanup literal handling v3 2013-02-16 11:28:22 +00:00
SIInstrInfo.h R600/SI: cleanup VGPR encoding 2013-02-07 19:39:45 +00:00
SIInstrInfo.td R600/SI: Add pattern to simplify i64 loading 2013-02-16 11:28:36 +00:00
SIInstructions.td R600/SI: Use MULADD_IEEE/V_MAD_F32 instruction for mad pattern 2013-02-18 14:11:28 +00:00
SIIntrinsics.td R600/SI: Make sample intrinsic address parameter type overloaded. 2013-02-07 17:02:13 +00:00
SIISelLowering.cpp R600/SI: nuke SReg_1 v3 2013-02-16 11:28:30 +00:00
SIISelLowering.h R600/SI: nuke SReg_1 v3 2013-02-16 11:28:30 +00:00
SILowerControlFlow.cpp R600/SI: cleanup literal handling v3 2013-02-16 11:28:22 +00:00
SIMachineFunctionInfo.cpp
SIMachineFunctionInfo.h
SIRegisterInfo.cpp
SIRegisterInfo.h
SIRegisterInfo.td R600/SI: nuke SReg_1 v3 2013-02-16 11:28:30 +00:00
SISchedule.td