| .. |
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char_array.qip
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osd_generator: add M9K support to allow larger character array
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2019-10-05 11:33:59 +03:00 |
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char_array.v
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osd_generator: add M9K support to allow larger character array
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2019-10-05 11:33:59 +03:00 |
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char_rom.qip
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first OSD implementation
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2019-10-03 02:03:43 +03:00 |
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char_rom.v
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first OSD implementation
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2019-10-03 02:03:43 +03:00 |
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ir_rcv.v
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Improve IR receiver tolerance
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2017-01-28 03:37:29 +02:00 |
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lat_tester_includes.v
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Scanline updates and fixes
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2019-03-23 00:09:46 +02:00 |
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lat_tester.v
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Update latency tester
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2017-10-28 12:10:54 +03:00 |
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linebuf.qip
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update to Quartus 17.1
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2017-12-07 21:35:08 +02:00 |
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linebuf.v
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update to Quartus 17.1
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2017-12-07 21:35:08 +02:00 |
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lpm_mult_4_hybr_ref_pre.qip
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add missing IP files
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2018-03-06 09:36:38 +01:00 |
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lpm_mult_4_hybr_ref_pre.v
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add missing IP files
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2018-03-06 09:36:38 +01:00 |
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lpm_mult_4_hybr_ref.qip
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various post processing pipeline updates:
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2018-03-06 09:36:21 +01:00 |
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lpm_mult_4_hybr_ref.v
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finer granulated steps for hybrid sl settings
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2018-03-07 10:21:18 +01:00 |
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lpm_mult_4_sl.qip
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add missing IP files
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2018-03-06 09:33:28 +01:00 |
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lpm_mult_4_sl.v
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SL Multiplication:
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2018-03-06 09:34:12 +01:00 |
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ossc.v
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fix linebuf read address timing bottleneck
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2019-10-07 01:25:33 +03:00 |
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pll_2x.ppf
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fix PLL reference clock switchover logic
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2019-10-09 23:58:55 +03:00 |
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pll_2x.qip
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optimize clock network
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2019-10-06 23:54:32 +03:00 |
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pll_2x.v
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fix PLL reference clock switchover logic
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2019-10-09 23:58:55 +03:00 |
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pll_config_2x_5x_data.mif
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optimize clock network
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2019-10-06 23:54:32 +03:00 |
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pll_config_3x_4x_data.mif
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optimize clock network
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2019-10-06 23:54:32 +03:00 |
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pll_config_default_data.mif
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fix PLL reference clock switchover logic
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2019-10-09 23:58:55 +03:00 |
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scanconverter.v
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fix PLL reference clock switchover logic
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2019-10-09 23:58:55 +03:00 |
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timescale.v
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Initial public release (FW 0.64)
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2016-02-23 01:03:50 +02:00 |
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videogen.v
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fix linebuf read address timing bottleneck
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2019-10-07 01:25:33 +03:00 |
