Apple1_MiST/rtl/apple1.v

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// Licensed to the Apache Software Foundation (ASF) under one
// or more contributor license agreements. See the NOTICE file
// distributed with this work for additional information
// regarding copyright ownership. The ASF licenses this file
// to you under the Apache License, Version 2.0 (the
// "License"); you may not use this file except in compliance
// with the License. You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing,
// software distributed under the License is distributed on an
// "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
// KIND, either express or implied. See the License for the
// specific language governing permissions and limitations
// under the License.
//
// Description: Apple1 hardware core
//
// Author.....: Alan Garfield
// Niels A. Moseley
// Date.......: 26-1-2018
//
module apple1(
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input reset, // reset
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input sys_clock, // system clock
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input pixel_clken, // 7 MHz pixel clock
input cpu_clken, // cpu clock enable
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// RAM interface
output [15:0] ram_addr,
output [7:0] ram_din,
input [7:0] ram_dout,
output ram_rd,
output ram_wr,
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// I/O interface to keyboard
input ps2_clk, // PS/2 keyboard serial clock input
input ps2_din, // PS/2 keyboard serial data input
// Outputs to VGA display
output vga_h_sync, // hozizontal VGA sync pulse
output vga_v_sync, // vertical VGA sync pulse
output vga_red, // red VGA signal
output vga_grn, // green VGA signal
output vga_blu, // blue VGA signal
input vga_cls, // clear screen button
output reset_key, // keyboard shortcut for reset
output poweroff_key // keyboard shortcut for poweroff/on
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);
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assign ram_addr = addr;
assign ram_din = cpu_dout;
assign ram_rd = ram_cs;
assign ram_wr = we & ram_cs;
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//////////////////////////////////////////////////////////////////////////
// Registers and Wires
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wire [15:0] addr;
wire [7:0] cpu_din;
wire [7:0] cpu_dout;
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wire we;
//////////////////////////////////////////////////////////////////////////
// 6502
arlet_6502 arlet_6502(
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.clk (sys_clock),
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.enable (cpu_clken),
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.rst (reset),
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.ab (addr),
.dbi (cpu_din),
.dbo (cpu_dout),
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.we (we),
.irq_n (1'b1),
.nmi_n (1'b1),
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.ready (cpu_clken)
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);
//////////////////////////////////////////////////////////////////////////
// Address Decoding
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wire keyboard_cs = (addr[15:1] == 15'b110100000001000); // 0xD010 -> 0xD011
wire display_cs = (addr[15:1] == 15'b110100000001001); // 0xD012 -> 0xD013
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wire ram_cs = !keyboard_cs & !display_cs;
// byte returned from display out
wire [7:0] display_dout = { ~PB7, 7'b0 };
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//////////////////////////////////////////////////////////////////////////
// Peripherals
// PS/2 keyboard interface
wire [7:0] ps2_dout;
wire cls_key;
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ps2keyboard keyboard(
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.clk(sys_clock),
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.rst(reset),
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.key_clk(ps2_clk),
.key_din(ps2_din),
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.cs(keyboard_cs),
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.address(addr[0]),
.dout(ps2_dout),
.cls_key(cls_key),
.reset_key(reset_key),
.poweroff_key(poweroff_key)
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);
wire PB7; // (negated) display ready (PB7 of CIA)
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display display(
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.reset(reset),
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.sys_clock(sys_clock),
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.pixel_clken(pixel_clken),
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.cpu_clken(cpu_clken & display_cs),
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.vga_h_sync(vga_h_sync),
.vga_v_sync(vga_v_sync),
.vga_red(vga_red),
.vga_grn(vga_grn),
.vga_blu(vga_blu),
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.address(addr[0]),
.w_en(we & display_cs),
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.din(cpu_dout),
.clr_screen(cls_key),
.ready(PB7)
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);
//////////////////////////////////////////////////////////////////////////
// CPU Data In MUX
// link up chip selected device to cpu input
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assign cpu_din = display_cs ? display_dout :
keyboard_cs ? ps2_dout :
ram_cs ? ram_dout :
8'hFF;
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endmodule