Apple-1-HW/RC6502-Apple-1-Replica
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182 Commits 1 Branch 3 Tags 146 MiB
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Author SHA1 Message Date
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8ffd6cb400 Added schematic for a bus monitor and single stepping card. 2018-12-23 01:12:41 +01:00
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f36f8700e3 Flipped decoder inputs, added details to silkscreen. 2018-12-23 01:12:14 +01:00
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6fd7df5eb0 Enhanced RAM/ROM board, routing done 2018-12-22 17:09:04 +01:00
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7dbb3f715b Schematic done for enhanced RAM/ROM board 2018-12-21 19:00:00 +01:00
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6f96621835 Moved incomplete add-on cards to abandoned. 2018-12-19 18:21:55 +01:00
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387ae4d119 Forced KiCad to actually use GND as ground name 2018-12-04 21:47:30 +01:00
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294df9eda7 Fixed footprint error 2018-12-04 21:36:13 +01:00
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77ffaff523 Assigned footprints 2018-12-04 21:24:15 +01:00
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4991b9cc4c Added description 2018-12-04 21:03:44 +01:00
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3f523c1871 Added analog circuit 2018-12-04 20:54:18 +01:00
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f7b1b1b4cd Digital logic added to schematic 2018-12-04 20:29:43 +01:00
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119308b48a Initial simulation of chip selects 2018-12-04 19:28:12 +01:00
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f480eb7541 VDU basic IO mapping start 2018-12-02 20:17:55 +01:00
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8bf93db474 Show R10, don't just link it! 2018-03-11 00:19:04 +01:00
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856e1b1898 Updated main README to mention SBC version 2018-03-11 00:16:40 +01:00
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2d4f4bb238 Added Arduino Nano to BOM 2018-03-11 00:07:41 +01:00
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5d3f972764 ... 2018-03-11 00:03:51 +01:00
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3e3ff720ca Added README image 2018-03-11 00:02:26 +01:00
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7248071295 R10 notice added 2018-03-11 00:02:01 +01:00
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e7a5af2335 SBC README added 2018-03-10 23:47:02 +01:00
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fcdf1bc530 Updated readme 2017-11-16 08:55:15 +01:00
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8d29558b56 Updated export and added screenshots 2017-11-10 11:00:47 +01:00
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9e5d7e9211 Moved oscillator right way up. 2017-07-12 23:04:39 +02:00
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025848c118 SBC Revision B 
Revision A still don't work with W65c02 processors, added BE signal pull-up (untested wether this improves 65c02 compatibility).
 2017-07-09 19:17:59 +02:00
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bd0a3a0245 Updated exports before sending to fabrication. 2017-06-20 00:21:20 +02:00
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bc6eb09231 Exported files with updated silkscreen 2017-06-17 23:06:51 +02:00
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2f51388fcc Yeah, I'm not going to get this within 10x10cm :-( 2017-06-17 23:06:33 +02:00
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b638f58cf2 Added all components 2017-06-16 20:22:01 +02:00
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602989fe86 Added VP GND details to silkscreen. 2017-06-15 16:29:38 +02:00
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654a2e2aec Exported files 2017-06-15 16:03:14 +02:00
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2adf184351 Added silkscreen newbie hints. 2017-06-15 15:58:58 +02:00
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313fde6627 Added ROM reference to SBC 2017-06-15 14:45:22 +02:00
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81874234ea SBC PCB layout completed 2017-06-15 13:38:20 +02:00
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5489e0e23e Updated Gerber exports before sending to manufacturing 2017-06-15 13:37:57 +02:00
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737f6ac5af Created simple backplane connector template 
Need to use this since KiCAD seems unable to copy between sheets.
 2017-06-15 13:37:32 +02:00
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3c2267d4a0 Connected RDY to the wrong pin. Ooops! 2017-06-15 13:35:40 +02:00
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ec896b5c34 typo :( 2017-06-13 15:57:45 +02:00
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fe585e7960 Updated README. 2017-06-13 15:57:04 +02:00
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b0e08a9833 Exported pcb preview 2017-06-11 20:20:20 +02:00
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4beffe4ed0 Fixed video adapter rca connector footprint. 2017-06-11 20:20:07 +02:00
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ae916e81d6 Video Adapter revision B 
Adds IO expanders for possibly offloading the actual image output rendering to an analog module via a separate connector.
 2017-06-11 19:23:24 +02:00
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aa97e3d531 Hide diode name (only one anyways) 2017-06-11 18:59:53 +02:00
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90820637cd Added SPI breakout details to silkscreen 2017-06-10 20:25:26 +02:00
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2dda03be5e Reset circuit revision B 
Fixed floating inputs on hex inverter (needed when using HCT), added 74HCT74 in order to allow clock division by 2 and 4 (in case missing matching TTL quartz crystal or want even slower clock than stock).
 2017-06-10 19:58:36 +02:00
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e51a21e59a RAM revision B 
Fixed silkscreen notes by swapping high/low text, moved around tracks to make it a little more compact.
 2017-06-10 17:50:00 +02:00
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50a54fe487 CPU revision B 
VP pin was added for W65c02, added SYNC and RDY pins and removed hex inverter.
 2017-06-10 01:40:30 +02:00
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98c5cd0eda Moved JP5 pins to back of board, only want to solder wire across it and not actually mount pins. 2017-06-09 19:28:45 +02:00
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d51d4028a6 ROM revision B 
JP5 inside U3 footprint is used to designate wether paging hardware is installed or not (skip  C3 and U3).
 2017-06-09 19:10:10 +02:00
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d87aab7e04 Changed crystal footprint 2017-06-09 00:01:35 +02:00
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07ef8d2e37 Added Video Adapter 2017-06-09 00:01:14 +02:00