Synopsys CPLD Technology Mapper, Version maplat, Build 923R, Built May 6 2014
Copyright (C) 1994-2013, Synopsys, Inc. This software and the associated documentation are proprietary to Synopsys, Inc. This software may only be used in accordance with the terms and conditions of a written license agreement with Synopsys, Inc. All other use or distribution of the software is strictly prohibited.
@W: MO111 :"c:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":497:16:497:18|Tristate driver CLK_DIV_OUT_1 on net CLK_DIV_OUT_1 has its enable tied to GND (module BUS68030)
@N: MO106 :"c:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":190:4:190:7|Found ROM, 'pos_clk\.cpu_est_11[3:0]', 16 words by 4 bits
@W: BN132 :"c:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":134:34:134:36|Removing instance CLK_000_P_SYNC[10], because it is equivalent to instance CLK_000_PE