8 Commits

Author	SHA1	Message	Date
Romain Dolbeau	b621ee2eb5	draft integration of CPLD in FPGA - can't have internal tri-state signals...	2022-11-01 11:36:51 +01:00
Romain Dolbeau	239b74823f	move to submodules XiBus	2022-10-31 15:28:08 +01:00
Romain Dolbeau	fbcfe3152c	DMA debug with XiBus NuBus & add alternate Migen implementation of NuBus	2022-06-04 09:53:09 +02:00
Romain Dolbeau	d53a70ba9e	Update memory map ; preliminary accel stuff to test (CW project missing, code resource INIT id 0 with the sysheap flag)	2022-05-15 14:43:15 +02:00
Romain Dolbeau	62b2c48b32	update to first tested version	2022-04-17 11:25:48 +02:00
Romain Dolbeau	de1aaf8161	some missing stuff, minor HW update, SW	2022-02-05 15:32:44 +01:00
Romain Dolbeau	68e63497af	more updates	2022-01-29 11:03:47 +01:00
Romain Dolbeau	5f0bc43139	push to github	2021-12-21 08:26:30 +01:00