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RAMSIMM-30
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34 Commits
9679d2fd79 ... a19f105125

Author SHA1 Message Date
Zane Kaminski a19f105125 New SOJ-DC with /WE bypass resistor 2023-02-28 11:32:17 -05:00
Zane Kaminski 6dbd1b7027 New GW4194A v1.1 with SOJ-VSSOP and SOJ-TSSOP boards. 
(SOP still has only TSSOP)
 2023-02-01 19:15:15 -05:00
Zane Kaminski 05ed9db9b2 Move PAL SIMM SOJ to "DP" directory in prep for "DC" version 2023-01-20 19:44:20 -05:00
Zane Kaminski 23035fdefa Add placement interactive HTML files 2023-01-09 14:51:53 -05:00
Zane Kaminski 4c8b1cb12a Update to KiCAD 6 2023-01-09 14:42:53 -05:00
Zane Kaminski 6a9afb9724 Update manuals 2022-12-18 08:47:01 -05:00
Zane Kaminski 9531b9c1bc Create SIMMInstallationGuide 2022-04-13 05:08:25 -04:00
Zane Kaminski e936637407 Documentation update 2021-09-04 23:57:14 -04:00
Zane Kaminski f2319d9d34 Selection guide done? 2021-08-06 02:28:41 -04:00
Zane Kaminski e9dde83af0 Fix missing copper area void on rear side edge connector 2021-08-03 11:24:15 -04:00
Zane Kaminski 4a4f5ab5fd Fabbed 2021-07-02 02:37:01 -04:00
Zane Kaminski d9db6b7aa8 more 2021-06-21 12:13:28 -04:00
Zane Kaminski 7041819469 Done with new layouts? 2021-06-19 02:22:35 -04:00
Zane Kaminski b927ecec6d Some more tweaks 2021-06-07 02:31:48 -04:00
Zane Kaminski 6c184df93a Added 16 MB SIMMs 2021-06-06 23:19:23 -04:00
Zane Kaminski d59e1d94cd Fabbed 2021-02-26 07:49:10 -05:00
Zane Kaminski 24f0c34f42 Taller (20mm height) 2021-02-26 03:40:27 -05:00
Zane Kaminski 55d64fc929 Fabbed 2020-12-26 22:46:54 -05:00
Zane Kaminski adbceda387 Unrounded bottom corners 2020-12-26 22:46:46 -05:00
Zane Kaminski 0f606387a8 Fixed bug in stitching 2020-05-16 13:13:21 -04:00
Zane Kaminski 388ac62504 Rounded corners 2020-05-16 13:08:07 -04:00
Zane Kaminski c40a9fbd12 Update .gitignore 2020-05-16 13:07:59 -04:00
Zane Kaminski 8d5b271cf1 Update .gitignore 2020-05-15 20:43:15 -04:00
Zane Kaminski 15e18b205b Flood power edge connector pins 2020-05-15 18:26:04 -04:00
Zane Kaminski 34aaa6ed32 Extended edge connector pads downward 2020-05-15 18:12:49 -04:00
Zane Kaminski a4fc382585 Cleaned up board a little 2020-05-15 16:53:48 -04:00
Zane Kaminski affa23e368 Changed text 2020-05-15 16:49:03 -04:00
Zane Kaminski 9037d8f8bb Removed JLCJLCJLC 2020-05-15 16:44:58 -04:00
Zane Kaminski 1b8a217631 Create Placement.png 2020-05-15 16:42:30 -04:00
Zane Kaminski fa86765704 Added back and front isometric renders 2020-05-15 16:41:07 -04:00
Zane Kaminski 33f37d9f39 Submitted to JLCPCB 2019-07-30 17:10:00 -04:00
Zane Kaminski e001d18b3d Finished routing. Now need to do the board outline more 2019-06-25 22:56:18 -04:00
Zane Kaminski 73e859a61e changed a lot 2019-06-09 21:10:28 -04:00
Zane Kaminski 703ab3aa6f idk more 2019-05-01 18:27:36 -04:00
254 changed files with 840428 additions and 3798 deletions
Show Stats Expand all files Collapse all files

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# For PCBs designed using KiCad: http://www.kicad-pcb.org/
# Format documentation: http://kicad-pcb.org/help/file-formats/
# Temporary files
*.000
*.bak
*.bck
*.kicad_pcb-bak
*.sch-bak
*~
_autosave-*
*.tmp
*-rescue.lib
*-save.pro
*-save.kicad_pcb
fp-info-cache
# Netlist files (exported from Eeschema)
*.net
# Autorouter files (exported from Pcbnew)
*.dsn
*.ses
*.DS_Store
Documentation/~$MSIMM30SelectionGuide.docx
GW4190-4MB-SOJ/GW4190-SOJ-backups/*
GW4190-4MB-SOP/GW4190-SOP-backups/*
GW4191-4MB-parity-SOJ/GW4191-SOJ-backups/*
GW4191-4MB-parity-SOP/GW4191-SOP-backups/*
GW4192-16MB-SOJ/GW4192-SOJ-backups/*
GW4192-16MB-SOP/GW4192-SOP-backups/*
GW4194-4MB-CBRFIX-SOJ-DC/GW4194-SOJ-DC-backups/*
GW4194-4MB-CBRFIX-SOJ-DP/GW4194-SOJ-DP-backups/*
GW4194-4MB-CBRFIX-SOP/GW4194-SOP-backups/*
*.kicad_prl
GW4194-4MB-CBRFIX-SOJ-DC/GW4194-SOJ-backups/GW4194-SOJ-2023-01-20_194304.zip

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{
"board": {
"design_settings": {
"defaults": {
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"copper_text_italic": false,
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"dimension_precision": 4,
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},
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}
],
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},
"rule_severities": {
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"courtyards_overlap": "error",
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"drill_out_of_range": "error",
"duplicate_footprints": "warning",
"extra_footprint": "warning",
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"hole_near_hole": "error",
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"item_on_disabled_layer": "error",
"items_not_allowed": "error",
"length_out_of_range": "error",
"malformed_courtyard": "error",
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"missing_footprint": "warning",
"net_conflict": "warning",
"npth_inside_courtyard": "ignore",
"padstack": "error",
"pth_inside_courtyard": "ignore",
"shorting_items": "error",
"silk_over_copper": "warning",
"silk_overlap": "warning",
"skew_out_of_range": "error",
"through_hole_pad_without_hole": "error",
"too_many_vias": "error",
"track_dangling": "warning",
"track_width": "error",
"tracks_crossing": "error",
"unconnected_items": "error",
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"zones_intersect": "error"
},
"rule_severitieslegacy_courtyards_overlap": true,
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0.45,
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{
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{
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}
],
"zones_allow_external_fillets": false,
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},
"layer_presets": []
},
"boards": [],
"cvpcb": {
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"erc": {
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"bus_to_bus_conflict": "error",
"bus_to_net_conflict": "error",
"different_unit_footprint": "error",
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"pin_not_driven": "error",
"pin_to_pin": "warning",
"power_pin_not_driven": "error",
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"unresolved_variable": "error",
"wire_dangling": "error"
}
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}
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(fp_lib_table
(lib (name stdpads)(type KiCad)(uri "$(KIPRJMOD)/../../stdpads.pretty")(options "")(descr ""))
)

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G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(5.1.10-1-10_14)*
G04 #@! TF.CreationDate,2021-07-28T15:37:25-04:00*
G04 #@! TF.ProjectId,GW4190-SOJ,47573431-3930-42d5-934f-4a2e6b696361,2.0-SOJ*
G04 #@! TF.SameCoordinates,Original*
G04 #@! TF.FileFunction,Profile,NP*
%FSLAX46Y46*%
G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
G04 Created by KiCad (PCBNEW (5.1.10-1-10_14)) date 2021-07-28 15:37:25*
%MOMM*%
%LPD*%
G01*
G04 APERTURE LIST*
G04 #@! TA.AperFunction,Profile*
%ADD10C,0.200000*%
G04 #@! TD*
G04 #@! TA.AperFunction,Profile*
%ADD11C,0.150000*%
G04 #@! TD*
G04 APERTURE END LIST*
D10*
X76454000Y-95250000D02*
G75*
G02*
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D10*
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M02*

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Ref,Val,Package,PosX,PosY,Rot,Side
1 Ref Val Package PosX PosY Rot Side

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### Module positions - created on Thursday, July 01, 2021 at 06:08:57 AM ###
### Printed by Pcbnew version kicad (5.1.10-1-10_14)
## Unit = mm, Angle = deg.
## Side : bottom
# Ref Val Package PosX PosY Rot Side
## End

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Ref,Val,Package,PosX,PosY,Rot,Side
"C1","2u2","C_0805",85.090000,-93.257000,270.000000,top
"C2","2u2","C_0805",105.410000,-93.257000,270.000000,top
"C3","2u2","C_0805",119.380000,-93.257000,270.000000,top
"C4","2u2","C_0805",139.700000,-93.257000,270.000000,top
"C5","2u2","C_0805",157.480000,-93.257000,90.000000,top
"R1","EDO","R_0805",82.700000,-86.500000,180.000000,top
"R2","FPM","R_0805",82.700000,-84.500000,0.000000,top
"U1","4C4M4","SOJ-24-26_300mil",129.540000,-89.662000,90.000000,top
"U2","4C4M4","SOJ-24-26_300mil",95.250000,-89.662000,90.000000,top
1 Ref Val Package PosX PosY Rot Side
2 C1 2u2 C_0805 85.090000 -93.257000 270.000000 top
3 C2 2u2 C_0805 105.410000 -93.257000 270.000000 top
4 C3 2u2 C_0805 119.380000 -93.257000 270.000000 top
5 C4 2u2 C_0805 139.700000 -93.257000 270.000000 top
6 C5 2u2 C_0805 157.480000 -93.257000 90.000000 top
7 R1 EDO R_0805 82.700000 -86.500000 180.000000 top
8 R2 FPM R_0805 82.700000 -84.500000 0.000000 top
9 U1 4C4M4 SOJ-24-26_300mil 129.540000 -89.662000 90.000000 top
10 U2 4C4M4 SOJ-24-26_300mil 95.250000 -89.662000 90.000000 top

15
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### Module positions - created on Thursday, July 01, 2021 at 06:08:57 AM ###
### Printed by Pcbnew version kicad (5.1.10-1-10_14)
## Unit = mm, Angle = deg.
## Side : top
# Ref Val Package PosX PosY Rot Side
C1 2u2 C_0805 85.0900 -93.2570 270.0000 top
C2 2u2 C_0805 105.4100 -93.2570 270.0000 top
C3 2u2 C_0805 119.3800 -93.2570 270.0000 top
C4 2u2 C_0805 139.7000 -93.2570 270.0000 top
C5 2u2 C_0805 157.4800 -93.2570 90.0000 top
R1 EDO R_0805 82.7000 -86.5000 180.0000 top
R2 FPM R_0805 82.7000 -84.5000 0.0000 top
U1 4C4M4 SOJ-24-26_300mil 129.5400 -89.6620 90.0000 top
U2 4C4M4 SOJ-24-26_300mil 95.2500 -89.6620 90.0000 top
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GW4190-4MB-SOP/gerber/GW4190-SOP-bottom-pos.csv Normal file
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GW4190-4MB-SOP/gerber/GW4190-SOP-bottom.pos Normal file
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### Module positions - created on Friday, July 02, 2021 at 02:33:59 AM ###
### Printed by Pcbnew version kicad (5.1.10-1-10_14)
## Unit = mm, Angle = deg.
## Side : bottom
# Ref Val Package PosX PosY Rot Side
## End

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GW4190-4MB-SOP/gerber/GW4190-SOP-top-pos.csv Normal file
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Ref,Val,Package,PosX,PosY,Rot,Side
"C1","2u2","C_0805",85.090000,-93.257000,90.000000,top
"C2","2u2","C_0805",105.410000,-93.257000,90.000000,top
"C3","2u2","C_0805",119.380000,-93.257000,90.000000,top
"C4","2u2","C_0805",139.700000,-93.257000,90.000000,top
"C5","2u2","C_0805",157.480000,-93.257000,90.000000,top
"R1","EDO","R_0805",82.700000,-86.500000,180.000000,top
"R2","FPM","R_0805",82.700000,-84.500000,0.000000,top
"U1","4C4M4","SOP-24-26_300mil",129.540000,-89.662000,90.000000,top
"U2","4C4M4","SOP-24-26_300mil",95.250000,-89.662000,90.000000,top
1 Ref Val Package PosX PosY Rot Side
2 C1 2u2 C_0805 85.090000 -93.257000 90.000000 top
3 C2 2u2 C_0805 105.410000 -93.257000 90.000000 top
4 C3 2u2 C_0805 119.380000 -93.257000 90.000000 top
5 C4 2u2 C_0805 139.700000 -93.257000 90.000000 top
6 C5 2u2 C_0805 157.480000 -93.257000 90.000000 top
7 R1 EDO R_0805 82.700000 -86.500000 180.000000 top
8 R2 FPM R_0805 82.700000 -84.500000 0.000000 top
9 U1 4C4M4 SOP-24-26_300mil 129.540000 -89.662000 90.000000 top
10 U2 4C4M4 SOP-24-26_300mil 95.250000 -89.662000 90.000000 top

15
GW4190-4MB-SOP/gerber/GW4190-SOP-top.pos Normal file
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### Module positions - created on Friday, July 02, 2021 at 02:33:59 AM ###
### Printed by Pcbnew version kicad (5.1.10-1-10_14)
## Unit = mm, Angle = deg.
## Side : top
# Ref Val Package PosX PosY Rot Side
C1 2u2 C_0805 85.0900 -93.2570 90.0000 top
C2 2u2 C_0805 105.4100 -93.2570 90.0000 top
C3 2u2 C_0805 119.3800 -93.2570 90.0000 top
C4 2u2 C_0805 139.7000 -93.2570 90.0000 top
C5 2u2 C_0805 157.4800 -93.2570 90.0000 top
R1 EDO R_0805 82.7000 -86.5000 180.0000 top
R2 FPM R_0805 82.7000 -84.5000 0.0000 top
U1 4C4M4 SOP-24-26_300mil 129.5400 -89.6620 90.0000 top
U2 4C4M4 SOP-24-26_300mil 95.2500 -89.6620 90.0000 top
## End

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M48
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### Module positions - created on Thursday, July 01, 2021 at 06:10:51 AM ###
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Ref,Val,Package,PosX,PosY,Rot,Side
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### Module positions - created on Thursday, July 01, 2021 at 06:10:51 AM ###
### Printed by Pcbnew version kicad (5.1.10-1-10_14)
## Unit = mm, Angle = deg.
## Side : top
# Ref Val Package PosX PosY Rot Side
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C2 2u2 C_0805 105.4100 -93.2570 270.0000 top
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R1 EDO R_0805 82.7000 -86.5000 180.0000 top
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"global_label_dangling": "warning",
"hier_label_mismatch": "error",
"label_dangling": "error",
"lib_symbol_issues": "warning",
"multiple_net_names": "warning",
"net_not_bus_member": "warning",
"no_connect_connected": "warning",
"no_connect_dangling": "warning",
"pin_not_connected": "error",
"pin_not_driven": "error",
"pin_to_pin": "warning",
"power_pin_not_driven": "error",
"similar_labels": "warning",
"unannotated": "error",
"unit_value_mismatch": "error",
"unresolved_variable": "error",
"wire_dangling": "error"
}
},
"libraries": {
"pinned_footprint_libs": [],
"pinned_symbol_libs": []
},
"meta": {
"filename": "GW4191-SOP.kicad_pro",
"version": 1
},
"net_settings": {
"classes": [
{
"bus_width": 12.0,
"clearance": 0.1524,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
"diff_pair_width": 0.2,
"line_style": 0,
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "Default",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.1524,
"via_diameter": 0.508,
"via_drill": 0.2,
"wire_width": 6.0
}
],
"meta": {
"version": 2
},
"net_colors": null
},
"pcbnew": {
"last_paths": {
"gencad": "",
"idf": "",
"netlist": "GW4191-SOP.net",
"specctra_dsn": "",
"step": "",
"vrml": ""
},
"page_layout_descr_file": ""
},
"schematic": {
"annotate_start_num": 0,
"drawing": {
"default_line_thickness": 6.0,
"default_text_size": 50.0,
"field_names": [],
"intersheets_ref_own_page": false,
"intersheets_ref_prefix": "",
"intersheets_ref_short": false,
"intersheets_ref_show": false,
"intersheets_ref_suffix": "",
"junction_size_choice": 3,
"label_size_ratio": 0.25,
"pin_symbol_size": 0.0,
"text_offset_ratio": 0.08
},
"legacy_lib_dir": "",
"legacy_lib_list": [],
"meta": {
"version": 1
},
"net_format_name": "Pcbnew",
"ngspice": {
"fix_include_paths": true,
"fix_passive_vals": false,
"meta": {
"version": 0
},
"model_mode": 0,
"workbook_filename": ""
},
"page_layout_descr_file": "",
"plot_directory": "",
"spice_adjust_passive_values": false,
"spice_external_command": "spice \"%I\"",
"subpart_first_id": 65,
"subpart_id_separator": 0
},
"sheets": [
[
"1fa02f60-d0c7-43d4-9072-655bfde28c58",
""
]
],
"text_variables": {}
}

2140
GW4191-4MB-parity-SOP/GW4191-SOP.kicad_sch Normal file
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3
GW4191-4MB-parity-SOP/fp-lib-table Normal file
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@ -0,0 +1,3 @@
(fp_lib_table
(lib (name stdpads)(type KiCad)(uri "$(KIPRJMOD)/../../stdpads.pretty")(options "")(descr ""))
)

11346
GW4191-4MB-parity-SOP/gerber/GW4191-SOP-B_Cu.gbl Normal file
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