Commit Graph

87 Commits

Author SHA1 Message Date
Andrew Makousky
7be998a7e5 mac128k PAL equations looking pretty good now. 2020-12-27 22:25:03 -06:00
Andrew Makousky
bf64640d5a Fix some of the mac128pal problems. 2020-12-27 18:43:37 -06:00
Andrew Makousky
92edcf0931 Transition to continuous assign, revealed equation problems.
But otherwise with problems fixed, simulation should be a lot faster.
2020-12-27 15:52:23 -06:00
Andrew Makousky
56dd957402 Mac 128k PAL signals mostly working, hooray!
Also start working on BBU video timing signals, and documentation
improvements.
2020-12-27 09:19:35 -06:00
Andrew Makousky
306024838b Finally figured out S5 is a pull-up resistor. 2020-12-24 11:23:08 -06:00
Andrew Makousky
b957f0cb84 Commit work-in-progress.
Some improvements made on accuracy of circuit descriptions.
2020-12-22 18:05:27 -06:00
Andrew Makousky
6a74bb5a13 Markdown file extension. 2020-12-20 09:53:31 -06:00
Andrew Makousky
a72a279d0f Add documentation on Macintosh case screws. 2020-12-20 09:48:11 -06:00
Andrew Makousky
6618602b1a BBU: Fix standard logic sim errors, naming improvement. 2020-11-30 13:50:57 -06:00
Andrew Makousky
fe87fea02c Fixes to mac128k PAL simulation issues, more documentation. 2020-11-28 16:36:09 -06:00
Andrew Makousky
c490406c81 BBU: More analysis and insight. 2020-11-25 17:18:41 -06:00
Andrew Makousky
602a9b564d BBU: Add DRAM sim, almost done with mac128k. 2020-11-25 06:04:07 -06:00
Andrew Makousky
600f120c85 RTC: Use open-drain signaling on 1SEC too. 2020-11-25 01:08:03 -06:00
Andrew Makousky
6678c4b2ab Commit BBU work-in-progress.
For comparative simulation, I'm also assembling the logic of the earlier
Macintosh 128K, and possibly also Macintosh Plus, in Verilog, and
planning on doing MLB board-level simulations too.
2020-11-25 01:05:48 -06:00
Andrew Makousky
4fa9303844 BBU: Commit work-in-progress, lots of corrections to be made. 2020-11-20 20:19:52 -06:00
Andrew Makousky
62d2e920e7 Commit work-in-progress.
Much better BBU pinout chart, lots of notes learned from Guide to the
Macintosh family hardware.
2020-11-18 10:21:05 -06:00
Andrew Makousky
12eb917c24 Fix macro use bugs found with new iverilog. 2020-11-15 22:29:54 -06:00
Andrew Makousky
757acda304 Better BBU README documentation. 2020-11-15 22:03:08 -06:00
Andrew Makousky
58759b51b8 BBU work-in-progress, fix a few documentation issues. 2020-11-15 20:36:44 -06:00
Andrew Makousky
f9200e43ac Commit work-in-progress of BBU FPGA in Verilog. 2020-10-25 09:00:40 -05:00
Andrew Makousky
bb049216e4 More schematic retrace corrections. 2020-10-25 08:59:42 -05:00
Andrew Makousky
b762f521e4 Fix retrace errors, RDO should be RDQ. 2020-10-20 00:35:20 -05:00
Andrew Makousky
389122f2aa Fix some Mac SE schematic redraw errors, more detailed BBU notes. 2020-10-18 14:47:39 -05:00
Andrew Makousky
ff5125bfb1 Add missing line above *IWM. 2020-10-18 12:16:08 -05:00
Andrew Makousky
56c2d2a139 Improve color matching on mac128k box art. 2020-10-18 12:15:45 -05:00
Andrew Makousky
cbf688bd19 Better info on BBU functions. 2020-10-18 12:15:14 -05:00
Andrew Makousky
5c5c078ae4 Packaging: Add Macintosh 128k design. 2020-10-16 12:43:53 -05:00
Andrew Makousky
1d08b176de Add packaging foam retrace work files. 2020-10-10 10:55:32 -05:00
Andrew Makousky
6f71120bbb Note source photo URL. 2020-10-09 19:22:47 -05:00
Andrew Makousky
3c97c4af43 Add script for getting Macintosh SE/30 halftone. 2020-10-09 19:13:21 -05:00
Andrew Makousky
9042d685ee RTC firmware: Fix handling of sysfs GPIO. 2020-10-03 17:56:50 -05:00
Andrew Makousky
bde06c2193 Merge branch 'master' of https://github.com/quorten/macsehw 2020-10-03 17:54:04 -05:00
Andrew Makousky
8b253a827a Macintosh SE box layout update, add SE/30 box layout. 2020-10-03 17:46:05 -05:00
Andrew Makousky
b8666e8f7c packaging: Use correct box background color. 2020-09-22 13:38:02 -05:00
Andrew Makousky
665856cfc0 RTC: Add missing watch/unwatch 1-second pin. 2020-09-17 05:43:14 -05:00
Andrew Makousky
de2b6f70ca RTC: Add test script capabilities.
Command line help, firmware filename is now optional.
2020-09-17 05:22:29 -05:00
Andrew Makousky
655c495bb3 RTC: Implement missing links for physical test mode.
Also minor refactoring.
2020-09-17 04:25:57 -05:00
Andrew Makousky
745d73b98a RTC: Program fuse bits from C source. 2020-09-17 02:46:49 -05:00
Andrew Makousky
c4d34dae71 Refactor to reduce RTC code size. 2020-09-17 00:41:02 -05:00
Andrew Makousky
4e6537e57a Cleanup, fix bug in RTC test code. 2020-09-17 00:00:00 -05:00
Andrew Makousky
3858671656 Timer accuracy improvement: += instead of =. 2020-09-13 18:38:44 -05:00
Andrew Makousky
c36265d2da Testing improvements.
* Fix deadlock condition due to improper mutex lock use.

* Refactor and improve test suite result reporting.

* Add echo command.

* Do not print prompt character and help message in scripted mode.
2020-09-13 18:31:38 -05:00
Andrew Makousky
08efc91131 Testing improvements.
* Add Raspberry Pi GPIO support functions.

* Add timestamps to the test suite.

* Add information on required headers for each module of the test
  software.
2020-09-12 15:11:53 -05:00
Andrew Makousky
d953828a1b F_CPU unsigned long constant. 2020-09-11 18:06:42 -05:00
Andrew Makousky
1ebb48e1c9 Update README.md, configure XTAL pins. 2020-09-11 16:38:32 -05:00
Andrew Makousky
1484f7a189 Remove tabs, oops sorry. 2020-09-11 16:12:18 -05:00
Andrew Makousky
93edc73c2a Add option to skip XPRAM tests. 2020-09-11 16:01:00 -05:00
Andrew Makousky
fe1bb541c1 Act on falling edge rather than rising edge.
Programming defensively with knowledge of the ROM quirks, this seems a
safer bet.
2020-09-11 15:50:15 -05:00
Andrew Makousky
3079bd621f Write automated test suite, 8 MHz clock, code cleanup. 2020-09-11 15:35:07 -05:00
Andrew Makousky
1d36abf470 Refactor test-rtc.c for more modular layout.
Yes, a more modular layout, albeit the fact that this is still but one
single source file.  However, this reorganization will better
facilitate breaking this up into module files.
2020-09-10 14:38:09 -05:00