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Author	SHA1	Message	Date
Maxim Poliakovski	edd3979647	Cuda: increase size of the input buffer.	2022-02-19 23:23:24 +01:00
Maxim Poliakovski	123f820775	ppcopcodes: fix lswi/stswi emulation.	2022-02-19 23:23:24 +01:00
Maxim Poliakovski	477ad7ddee	ppcopcodes: fix lswx/stswx emulation.	2022-02-19 23:23:24 +01:00
Maxim Poliakovski	689fe51d80	Add required includes for gcc.	2022-02-17 00:50:37 +01:00
Maxim Poliakovski	b39e884d61	ppcfpopcodes: add missing std:: prefixes.	2022-02-17 00:20:18 +01:00
Maxim Poliakovski	de65196c4f	ppcfpopcodes: remove unused template parameters.	2022-02-17 00:11:14 +01:00
Maxim Poliakovski	8f528184b8	Fix compilation with gcc, part 1.	2022-02-16 23:52:43 +01:00
Maxim Poliakovski	2ce2cae48c	SWIM3: implement disk reading.	2022-02-15 15:55:16 +01:00
Maxim Poliakovski	579a56f749	AMIC: implement floppy DMA channel.	2022-02-15 15:54:21 +01:00
Maxim Poliakovski	2525398b6e	SWIM3: add support for floppy DMA.	2022-02-15 15:53:18 +01:00
Maxim Poliakovski	e91843034b	Superdrive: method for retrieving disk data.	2022-02-15 15:49:12 +01:00
Maxim Poliakovski	9da4a9ec6a	SWIM3: respect interrupt enable flag in mode register.	2022-02-14 23:06:07 +01:00
Maxim Poliakovski	cfb8977f09	AMIC: implement floppy DMA registers.	2022-02-13 23:47:45 +01:00
Maxim Poliakovski	54107b2aac	SWIM3: track seeking and header reading.	2022-02-13 03:07:32 +01:00
Maxim Poliakovski	8d8cecbaba	Superdrive: implement track seeking.	2022-02-13 03:05:55 +01:00
Maxim Poliakovski	0d3fd01fef	Improve emulation of the VIA timers.	2022-02-13 03:02:17 +01:00
Maxim Poliakovski	9f3f46603f	AMIC: handle SWIM3 interrupts.	2022-02-07 23:10:17 +01:00
Maxim Poliakovski	c77155199b	Superdrive: report track zero status.	2022-02-07 23:05:58 +01:00
Maxim Poliakovski	1872eca44f	SWIM3: implement head stepping.	2022-02-07 23:05:58 +01:00
Maxim Poliakovski	9aaf441625	Superdrive: more commands and status requests.	2022-02-07 15:05:57 +01:00
Maxim Poliakovski	b9fbd9b7c9	Superdrive: support for inserting of virtual disks.	2022-02-06 21:23:20 +01:00
Maxim Poliakovski	5e2f2b12e4	Properly connect Superdrive to SWIM3 and machines.	2022-02-06 15:23:30 +01:00
Maxim Poliakovski	b25b526582	hwcomponent: add floppy disk drive component type.	2022-02-06 15:20:07 +01:00
Maxim Poliakovski	dea863b6e6	Superdrive: support disk-in-drive status.	2022-02-06 03:25:35 +01:00
Maxim Poliakovski	00093bdc95	sc53c94: support interrupts.	2022-02-06 01:50:54 +01:00
Maxim Poliakovski	298135fd7a	AMIC: process VIA2 interrupts.	2022-02-06 01:50:54 +01:00
Maxim Poliakovski	7c53620a40	sc53c94: implement sequencer and some commands.	2022-02-06 01:50:54 +01:00
Maxim Poliakovski	2edb50a821	machinepdm: add internal SCSI bus.	2022-02-06 01:50:54 +01:00
Maxim Poliakovski	b5f70feb28	Initial SCSI bus emulation.	2022-02-06 01:50:54 +01:00
Maxim Poliakovski	25a4fd1107	Allow adding timers from timer callbacks.	2022-02-05 17:10:57 +01:00
Maxim Poliakovski	5c177cc50f	Simplify registration of HW component types.	2022-01-26 16:45:21 +01:00
Maxim Poliakovski	dc34f282b7	53C94: support more registers and commands.	2022-01-24 22:55:49 +01:00
dingusdev	3258abe190	crnand and crnor fixes	2022-01-22 22:33:13 -07:00
Maxim Poliakovski	5883524fb8	53C94: chip initialization and identification.	2022-01-22 04:37:52 +01:00
Maxim Poliakovski	c8d39d5ee5	ppcopcodes: fix creqv emulation.	2022-01-21 16:32:07 +01:00
Maxim Poliakovski	2442bd17b3	ppcopcodes: fix crand emulation.	2022-01-21 14:56:10 +01:00
Maxim Poliakovski	c864b9b7d9	ppcopcodes: fix cror emulation.	2022-01-21 14:37:51 +01:00
Maxim Poliakovski	3bdc6f915a	AMIC: implement periodic VBL (60.15 Hz) interrupt.	2022-01-21 12:42:05 +01:00
Maxim Poliakovski	0899186ffc	ViaCuda: implement post-initialization.	2022-01-21 12:42:05 +01:00
Maxim Poliakovski	c1208b398e	Add posti-initialization to HW components.	2022-01-21 12:42:05 +01:00
Maxim Poliakovski	4867a68e11	VIA: public method for asserting control lines.	2022-01-21 11:08:32 +01:00
Maxim Poliakovski	d8c3cfc38e	Fix next instruction address after external exceptions.	2022-01-20 01:38:41 +01:00
Maxim Poliakovski	604b4bc2e5	Fix main CMakeLists.txt to include core for all targets.	2022-01-19 22:18:00 +01:00
Maxim Poliakovski	e1e651966e	Revert "Further condition reg opcode patches" ... This reverts commit 756d32df07.	2022-01-10 18:10:39 +01:00
Maxim Poliakovski	c12bab9e27	Revert "Quick fix for creqv" ... This reverts commit 8efc61e1b9.	2022-01-10 18:01:48 +01:00
Maxim Poliakovski	9c4e6c8a86	Rewrite ViaCuda to support SR and T2 interrupts.	2022-01-10 17:56:24 +01:00
Maxim Poliakovski	c218badd5a	Clean up some ctors/dtors.	2022-01-10 17:56:24 +01:00
Maxim Poliakovski	d61d1d71eb	Add interrupt processing to AMIC.	2022-01-10 17:56:24 +01:00
Maxim Poliakovski	d9d8384d4a	Add interrupt controller interface and definitions.	2022-01-10 17:56:24 +01:00
Maxim Poliakovski	aefc66d118	Fix external exception processing.	2022-01-10 17:56:24 +01:00