Maxim Poliakovski
5b90a3e21d
AMIC: rework and improve interrupts.
2023-08-01 17:42:52 +02:00
Maxim Poliakovski
7bb7ff9f0f
heathrow: human-readable DBDMA channel names.
2023-07-24 15:20:52 +02:00
Maxim Poliakovski
14c7d18bdb
Revert "Prevents crashing for Big Mac"
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This reverts commit 5787d49e9b
2023-07-23 16:28:31 +02:00
dingusdev
5787d49e9b
Prevents crashing for Big Mac
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For some reason, on Windows, whether it be VS2022 or Clang, it will crash when trying to write to a Big Mac register if you don't specify the exact name of the component within Heathrow.
This commit fixes that.
2023-07-22 15:15:33 -07:00
Maxim Poliakovski
742003b6f3
Basic BigMac Ethernet controller emulation.
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Emulates MII and some PHY configuration registers.
2023-07-08 01:27:01 +02:00
Maxim Poliakovski
f733859e28
heathrow: support for IDE interrupts.
2023-06-18 23:31:28 +02:00
Maxim Poliakovski
f809124a2e
Improve SCSI bus registration.
2023-05-30 19:46:27 +02:00
Maxim Poliakovski
22798fe14e
Fix compilation of the audio codec classes.
2023-04-23 21:04:24 +02:00
Maxim Poliakovski
44478b6937
heathrow: implement floppy DMA interrupts.
2023-04-22 22:53:20 +02:00
Maxim Poliakovski
03595c3940
Merge remote-tracking branch 'origin/machine-yosemite'
2023-04-21 12:49:58 +02:00
Maxim Poliakovski
4093c6e83c
amic: fix SCSI DMA to match newer MMU API.
2023-04-17 01:32:29 +02:00
Maxim Poliakovski
cf0d361918
Merge 'hard-disks' branch.
2023-04-17 01:20:38 +02:00
Maxim Poliakovski
d76433f112
heathrow: properly relocate memory space.
2023-02-25 18:14:42 +01:00
Maxim Poliakovski
5d7450df90
heathrow: locate sound HW by type.
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That allows using sound codecs other than Screamer with Heathrow.
2023-02-25 18:14:42 +01:00
Maxim Poliakovski
3234f21cab
Overhaul audio codec classes.
2023-02-25 18:14:42 +01:00
Maxim Poliakovski
cc17035e67
pcidevice: improve BAR configuration.
2023-02-04 17:57:46 +01:00
joevt
2a64f547cc
Add 64-bit BAR support.
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While dingusppc only emulates 32-bit Macs (for now), it is possible for a 32-bit Power Mac to use a PCIe card that has 64-bit BARs.
finish_config_bars is added to scan the cfg values of the BARs and determine their type. The type is stored separately so that it does not need to be determined again.
The type can be I/O (16 or 32 bit) or Mem (20 or 32 or 64 bit). A 64 bit bar is two BARs, the second contains the most significant 32 bits.
set_bar_value uses the stored type instead of trying to determine the type itself. It is always called even when the firmware is doing sizing. For sizing, It does the job of setting the bar value so do_bar_sizing is now just a stub.
Every PCIDevice that has a BAR needs to call finish_config_bars after setting up the cfg values just as they need to setup the cfg values. Since they need to do both, maybe the cfg values should be arguments of finish_config_bars, then finish_config_bars() should be renamed config_bars().
2023-02-02 02:47:34 -08:00
Maxim Poliakovski
449cc96612
Basic MESH emulation.
2023-01-25 20:58:30 +01:00
Maxim Poliakovski
8002737124
Basic O'Hare I/O controller emulation.
2022-12-23 17:19:46 +01:00
Maxim Poliakovski
a892842b8f
Refactor ATA/IDE classes.
2022-12-07 22:36:25 +01:00
dingusdev
58908621e6
IDE refinements
2022-12-05 08:42:51 -07:00
dingusdev
311538b81d
Fix IDE functionality
2022-11-26 21:34:54 -07:00
Maxim Poliakovski
a0dd1884b3
macio: properly wire floppy DMA.
2022-11-17 18:03:18 +01:00
Maxim Poliakovski
9f4c248e4c
Rework DBDMA logic for bidirectional channels.
2022-11-17 18:03:18 +01:00
Maxim Poliakovski
dac50fe0fb
GrandCentral: fix DMA dispatching.
2022-11-17 18:03:18 +01:00
Maxim Poliakovski
c87fc10376
amic: implement SCSI DMA.
2022-11-07 21:56:27 +01:00
Maxim Poliakovski
6ffe28a8a4
Implement SCSI Pseudo-DMA register on PDM.
2022-11-01 01:17:50 +01:00
Maxim Poliakovski
3f2b77fd59
amic: basic writing to the VIA2 IFR.
2022-10-31 23:21:35 +01:00
dingusdev
b480903c7a
Slight code clean-up
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Prevents crashing
2022-10-30 15:38:09 -07:00
dingusdev
aa1d23e08b
Fixed hard disk support
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Compiles, still unfinished
2022-10-22 11:41:52 -07:00
dingusdev
ee9573327c
Reorganized hard disk code
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Not compiling yet.
2022-10-08 16:51:54 -07:00
Maxim Poliakovski
6c59bf4203
heathrow: fix interrupt processing.
2022-08-24 14:58:07 +02:00
Maxim Poliakovski
bb77b2d525
grandcentral: fix interrupt processing.
2022-08-24 14:58:07 +02:00
Maxim Poliakovski
293c5a40f3
amic: fix PDM interrupts.
2022-08-24 14:58:07 +02:00
joevt
3ee2ea1871
Fix read/write argument names
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base class uses reg_start so derived classes should do the same.
Some derived class already uses reg_start for read method.
2022-08-22 17:16:22 -07:00
joevt
b76bfedf4b
Remove unnecessary linefeeds from log
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To remove blank lines in the dingusppc.log file or in the console output when -d is used.
2022-08-14 05:26:56 -07:00
Maxim Poliakovski
56db0426a4
heathrow: fix EMMO bit.
2022-08-08 21:06:57 +02:00
Maxim Poliakovski
cd1d0031e6
GC: implement attachable IOBus devices.
2022-08-07 15:25:58 +02:00
Maxim Poliakovski
c3939e3b25
Gossamer: factory test control.
2022-07-20 20:08:37 +02:00
Maxim Poliakovski
f0553720d6
Catalyst: factory test control.
2022-07-20 01:36:45 +02:00
Maxim Poliakovski
3c062443f6
PDM: factory test control.
2022-07-20 01:36:05 +02:00
Maxim Poliakovski
c0078ce97d
Refactor MachineBase and MachineFactory classes.
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Adding new machines is much easier now.
A significant amount of duplicated code has been reduced.
2022-07-18 20:27:34 +02:00
Maxim Poliakovski
9056d53474
macio: self-registration with the device registry.
2022-07-18 20:27:34 +02:00
Maxim Poliakovski
ca51c34157
amic: self-registration with the device registry.
2022-07-18 20:27:34 +02:00
Maxim Poliakovski
5668fc161f
macio: fix SWIM3 register space accesses.
2022-06-13 23:15:48 +02:00
Maxim Poliakovski
8889759f33
GrandCentral: improve error logging.
2022-05-21 14:45:33 +02:00
Maxim Poliakovski
533edf6ef5
GrandCentral: properly connect Curio SCSI.
2022-05-17 13:27:58 +02:00
Maxim Poliakovski
d4c08bbe31
Fix ESCC register addressing.
2022-05-07 21:47:22 +02:00
Maxim Poliakovski
4d87ed9b38
Make NVRAM a full-fledged HW component.
2022-03-29 01:55:11 +02:00
Maxim Poliakovski
d71a7b8694
GrandCentral: basic device interrupt handling.
2022-03-28 18:33:59 +02:00
