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1107 Commits

Author SHA1 Message Date
gbeauche
9e1d1606ff Cosmetic fixes to vm_write_memory_*() functions. 2003-12-26 17:27:47 +00:00
gbeauche
97ce4fdc75 Match Linux/ppc native version better: jump to ROM with EmulatorData in r4, 
preserve CR & XER registers on EmulOp.
 2003-12-25 23:54:36 +00:00
gbeauche
561046449a Fix no JIT & no decode cache case to default to interpretive mode only. 2003-12-25 23:33:15 +00:00
gbeauche
f5aed53e3c clean-ups, going to beat myself tonight 2003-12-15 15:27:01 +00:00
gbeauche
c3a706d354 There may be extra instructions before moving stuff to SCC registers. 2003-12-15 15:25:38 +00:00
gbeauche
24c4ae354c Fix SCC initialization code detection. Move up AddrMap patch space since 
we clobber 40 bytes below it and it may intersect with GetScrap patch space.
 2003-12-15 15:23:59 +00:00
gbeauche
ae8c08b260 Generic ROM patches from ROMTYPE_PARCELS experiments, no apparent 
regession. There is no improvement either.
 2003-12-14 14:23:46 +00:00
gbeauche
bbde2a2054 Use an alternate stack base while servicing PowerPC interrupts. 2003-12-05 13:37:56 +00:00
gbeauche
c3bb2eabf1 Really clear the zero page. 2003-12-05 12:41:19 +00:00
gbeauche
4755f118df Revert 32-bit EA load/stores workaround, problem was 0xffffffff read from 
[PgChk]+4 which yields to 3 on 32-bit arches and something > 32-bit on AMD64
 2003-12-05 12:38:44 +00:00
gbeauche
e517594a51 Fake reading from [HpChk]+4 (FIXME: the callchain reports some function 
from DriverServicesLib). Also make fake SCSIGlobals map to zero page.
 2003-12-05 12:37:14 +00:00
gbeauche
44e54f730a Add XLM_ZERO_PAGE globals which points to a read-only page with all bits 
set to zero.
 2003-12-05 12:36:11 +00:00
gbeauche
091a219280 Use a unique ExecuteNative() interface in any case, i.e. native & emulated 2003-12-04 23:37:38 +00:00
gbeauche
7a7363fd18 Forgot to add thunks.cpp to BeOS Makefile too 2003-12-04 22:34:48 +00:00
gbeauche
d1a676eb1c Fix ExecutePPC() with nw SheepRoutineDescriptor 2003-12-04 22:34:34 +00:00
gbeauche
ddbebd7111 Fix ExecutePPC() merge with new SheepRoutineDescriptor 2003-12-04 22:33:24 +00:00
gbeauche
779b4858d2 We do need <pthread.h> in any case, especially native Linux/PPC 2003-12-04 22:29:15 +00:00
gbeauche
63219873b4 Don't set WANT_JIT if not EMULATED_PPC 2003-12-04 22:28:40 +00:00
gbeauche
158f63d1e3 Force 32-bit EA in load/store operations. This fixes SheepShaver/JIT on AMD64. 2003-12-04 18:10:36 +00:00
gbeauche
5dca41d253 Add gen_invoke_CPU_im_im() to invoke do_record_step(pc, opcode). 2003-12-04 17:53:04 +00:00
gbeauche
328bb9f239 Add new thunking system for 64-bit fixes. 2003-12-04 17:26:38 +00:00
gbeauche
982424dabd Use "cpu/vm.hpp" if EMULATED_PPC, so that target optimized functions are 
used to match alignment/endianess needs.
 2003-12-03 15:06:09 +00:00
gbeauche
490fa2d553 Add x86 asm opts (though disabled for now) 2003-12-03 11:45:45 +00:00
gbeauche
5b0569944f Don't enable asm opts for now, this hides measurability of other generic 
optimizations. Remove no longer used synthetic instructions.
 2003-12-03 11:45:13 +00:00
gbeauche
0c2735dbcc fix stats reports 2003-12-03 10:59:43 +00:00
gbeauche
7ebe0347bf Add "jit" prefs item. Fix PPC_DECODE_CACHE version to fill in new min_pc & 
max_pc members of block info. Increase -finline-limit to 10000 for older gcc
 2003-12-03 10:52:50 +00:00
gbeauche
34f90d6b3a PowerPC tester: open results file in binary mode, aka fix pb on DOS. 2003-12-03 09:16:46 +00:00
gbeauche
8db8d10287 fix extraction of XER from QEMU engine 2003-12-03 07:27:05 +00:00
gbeauche
04214f3820 Fix decrement the CTR, then branch conditional if decremented CTR != 0. 
Remove CR cache for now. Remove BC & MODE_68K hacks for SheepShaver,
that was a colateral damage of wrong branch emulation of the former.
 2003-12-02 22:49:18 +00:00
gbeauche
dc79320904 cleanups 2003-12-02 15:00:40 +00:00
gbeauche
3ca595a337 PowerPC tester: add support for QEMU engine. 2003-12-02 14:57:07 +00:00
gbeauche
07c8e505c9 PowerPC tester: add support for Bart's Model 3 CPU emulator 2003-12-02 11:29:46 +00:00
gbeauche
32133b2261 Add PPC_PROFILE_GENERIC_CALLS, don't enable PPC_PROFILE_COMPILE_TIME by 
default.
 2003-12-01 13:51:35 +00:00
gbeauche
e2ca6270f8 Implement ISYNC, MTCRF, MCRF. 2003-12-01 13:40:38 +00:00
gbeauche
054748532a NOP'ize unimplemented instructions 2003-12-01 13:21:41 +00:00
gbeauche
dd956c78db gather some stats on untranslated instructions 2003-12-01 13:07:26 +00:00
gbeauche
32f34c07c5 fix stack allocation, really roundup to next 16 KB boundaries 2003-12-01 11:02:13 +00:00
gbeauche
f034ae704f handle ROM areas and put associated blocks into dormant state 2003-12-01 00:16:21 +00:00
gbeauche
ceb9b4a428 cleanups & optimize for constant branches (i.e. follow them). 2003-12-01 00:03:02 +00:00
gbeauche
4a3cd024ed better handling of static translation cache allocation, handle nested 
execution paths from the cpu core, cleanups for KPX_MAX_CPUS == 1.
 2003-11-30 17:21:53 +00:00
gbeauche
c1dba58808 fix & reenable asm compare ops for ppc 2003-11-30 17:18:17 +00:00
gbeauche
10db506aa5 handle CR cache though it's not efficient with current approach without 
superblock (traces) optimization.
 2003-11-30 17:17:32 +00:00
gbeauche
7594e26d36 fix new block creation on full cache that was just invalidated, add 
provisions for following constants jumps in next commit.
 2003-11-30 17:16:24 +00:00
gbeauche
833fc0c935 remove dead code 2003-11-30 17:13:10 +00:00
gbeauche
efad4ff3b6 Handle even more XER test masks to be preserved or to be set. 2003-11-30 09:07:36 +00:00
gbeauche
d0a2277325 Gather stats about compile time. Define KPX_MAX_CPUS to 1 for allowing 
allocation of translation cache into .data section on PowerPC.
 2003-11-28 22:13:50 +00:00
gbeauche
0301afb3eb first part of CR caching fixes 2003-11-28 22:11:59 +00:00
gbeauche
6a7c8f7e83 Add PowerPC tester glue for Microlib CPU core 2003-11-28 15:12:37 +00:00
gbeauche
3bea82fa1c fix merge, hunks were missing 2003-11-27 23:59:00 +00:00
gbeauche
8ca440d0b5 Fix SRAW on non PowerPC platforms. 2003-11-27 23:53:41 +00:00
gbeauche
8711c4afd6 Add support for external results file for non PowerPC platforms. 2003-11-27 23:52:19 +00:00
gbeauche
687b9c5a74 I manually synchronize with Kheperix code. 2003-11-27 20:07:33 +00:00
gbeauche
aee3e05e4b The JIT should work now but there is an extra bottleneck causing it to 
not match Kheperix speeds while executing Linux/ppc binaries.

Fix x86 DYNGEN_OP_FLAGS settings. Only allocate translation cache in .data
on PPC since x86 can do jumps anywhere.
 2003-11-27 11:09:38 +00:00
gbeauche
2bacb2fd01 Workaround CR expectations in MODE_68K execution 2003-11-27 11:06:23 +00:00
gbeauche
d7ac6a0e68 Fix SLW & SRW, an x86 does not work the same way as a ppc 2003-11-27 10:53:37 +00:00
gbeauche
ae2d91912c fix dummy includes 2003-11-27 10:06:27 +00:00
gbeauche
36ce9c07e6 Statically allocate the translation cache on PowerPC. This makes it possible 
to generate direct bl instructions for function invokation.
 2003-11-27 00:26:35 +00:00
gbeauche
e30001bc00 Fix BCCTR & BCLR. However, conditions are still wrong somehow, disabled 
this case. Factored & optimized branch instructions.
 2003-11-26 23:58:14 +00:00
gbeauche
2eba241021 self credit cpu emulator ;-) 2003-11-25 10:27:59 +00:00
gbeauche
73d51962f6 Merge in-progress PowerPC "JIT1" engine for AMD64, IA-32, PPC. 
The merge probably got wrong as there are some problems probably due to the
experiment begining with CR deferred evaluation. With nbench/ppc, performance
improvement was around 2x. With nbench on x86, performance improvement was
around 4x on average.

Incompatible change: instr_info_t has a new field in the middle. But since
insertion of PPC_I(XXX) identifiers is auto-generated, there is no problem.
 2003-11-24 23:45:52 +00:00
gbeauche
7968a20100 Handle "JIT1" engine but disable it for now since there are some problems 
with SheepShaver integration from Kheperix.
 2003-11-24 23:39:35 +00:00
gbeauche
09a774ae51 Add link to B2 Unix/config.{guess,sub} 2003-11-24 22:19:35 +00:00
gbeauche
2a0f750a83 Optimize memory accesses on little endian systems that can do unaligned 
accesses to memory. Fix build when vm.hpp is included in a C program.
 2003-11-24 21:30:17 +00:00
gbeauche
04349eebce Optimized bswap_32() for AMD64 2003-11-24 21:20:47 +00:00
gbeauche
1dbe1179c6 Merge in "keycodes" support from Basilisk II. e.g. make French keyboard 
layout work correctly for me.
 2003-11-21 17:01:33 +00:00
gbeauche
5b950fa2ef fix shm screen image allocation. 2003-11-20 16:24:57 +00:00
gbeauche
b7c917e6d1 little endian fixes to name registry 2003-11-20 15:54:10 +00:00
gbeauche
e9f3546539 Remove even more obsolete code. Drop TBL/TBU registers, they are manually 
handled through the mftb instruction accessor.
 2003-11-11 11:44:34 +00:00
gbeauche
cf0ed72f24 Remove obsolete code related to PPC_NO_FPSCR_UPDATE, PPC_LAZY_PC_UPDATE, 
PPC_LAZY_CC_UPDATE, PPC_HAVE_SPLIT_CR defines.
 2003-11-11 11:32:27 +00:00
gbeauche
b66d8ef433 Fix "ignoresegv" case to actually skip the faulty instruction. Merge 
conditions to skip instruction on SIGSEGVfrom PowerPC native mode. The
instruction skipper takes care to set the output register to 0.
 2003-11-10 16:23:58 +00:00
gbeauche
26ec1b8899 Merge Set_pthread_attr() from Basilisk II. 2003-11-10 16:05:52 +00:00
gbeauche
0260210ddf - XLM_IRQ_NEST is always in native byte order format since any write to 
this variable go through {Enable,Disable}Interrupt().
- Add Ether thunks but only for WORDS_BIGENDIAN case since we do need more
complicated translation functions.
 2003-11-10 15:11:44 +00:00
gbeauche
cbb8efd492 little endian fixes 2003-11-10 14:18:34 +00:00
gbeauche
cd86ff9e94 - Start emulating the FPSCR. Fix mtfsf, mffs. 
- Implement mftbr so that MacOS can fully boot with extensions. However,
  using clock() is probably not the right solution. Patching UpTime from
  DriverServicesLib et al. may be a better solution.
 2003-11-09 15:39:30 +00:00
gbeauche
59e6227c08 fix mullwo & divw on invalid inputs 2003-11-09 07:19:39 +00:00
gbeauche
aebcb7a6bb New testing framework faster to compile and more flexible. i.e. we now 
generate 350K+ instructions. This exhausts errors for mullwo & divw.
 2003-11-08 11:57:04 +00:00
gbeauche
4b73163083 Fix PPC_LAZY_CC_UPDATE build. TODO: remove since this is slower. 2003-11-04 22:01:36 +00:00
gbeauche
175dfeea02 fix lfs/stfs breakage introduced with latest FPR type change 2003-11-04 20:56:21 +00:00
gbeauche
8c40d739b6 Add some statistics for interrupt handling, Execute68k/Trap, MacOS & NativeOp 2003-11-04 20:48:29 +00:00
gbeauche
42e1cabc94 Move variables for compile statistics to powerpc_cpu private data 2003-11-04 20:45:46 +00:00
gbeauche
30bd089279 PowerPC floating-point registers are now an union of uint64 & double. This 
eases FP load/stores.
 2003-11-04 15:03:15 +00:00
gbeauche
8ddf749ed5 fix vm_do_read_memory_8() 2003-11-04 15:00:02 +00:00
gbeauche
a42281aad1 Implement partial block cache invalidation. Rewrite core cached blocks 
execution loop with a Duff's device. Gather some predecode time statistics.
This shows that only around 2% of total emulation time is spent for
predecoding the instructions.
 2003-11-03 21:28:32 +00:00
gbeauche
f0ea192460 Optimized pointers to non virtual member functions. This reduces space 
and overhead since runtime checks are eliminated. Actually, it yields
up to 10% performance improvement with specialized decoders.
 2003-11-02 14:48:20 +00:00
gbeauche
d956d3c4ca add specialized instruction decoders (disabled for now) 2003-11-01 17:07:17 +00:00
gbeauche
066af7452a fix ppc-execute.o dependency 2003-11-01 17:03:55 +00:00
gbeauche
89d0f9ca29 Integrate spcflags handling code to kpx_cpu core. We can also remove 
oldish EXEC_RETURN handling with a throw/catch mechanism since we
do have a dependency on extra conditions (invalidated cache) that
prevents fast execution loops.
 2003-11-01 15:15:31 +00:00
gbeauche
9ce43c6cf3 Fix ASYNC_IRQ build but locks may still happen. Note that with a predecode 
cache, checking for pending interrupts may not be the bottle neck nowadays.
 2003-10-26 14:16:40 +00:00
gbeauche
60d34a6816 Rewrite interrupts handling code so that the emulator can work with a 
predecode cache. This implies to run in interpreted mode only while
processing EmulOps or other native (nested) runs.

Note that the FLIGHT_RECORDER with a predecode cache gets slower than
without caching at all.
 2003-10-26 13:59:04 +00:00
gbeauche
d766049d59 - enable multicore cpu emulation with ASYNC_IRQ 
- move atomic_* operations to main_unix so that they could use spinlocks or
  other platform-specific locking mechanisms
 2003-10-26 09:14:14 +00:00
gbeauche
7312739738 fix MakeExecutable patch for little endian systems 2003-10-26 08:48:48 +00:00
gbeauche
46a1b4ada5 allow DGA & Xshm only on local displays 2003-10-26 07:54:02 +00:00
cebix
5f0a739cc7 - fixed compilation problems under BeOS 
- boot drive wasn't set correctly
 2003-10-26 00:32:31 +00:00
gbeauche
ccf89d9efb Preserve CR in execute_68k(). This enables MacOS 8.6 to work. ;-) 2003-10-19 21:37:43 +00:00
gbeauche
cb13fe3007 Log both r24 (m68k emulator PC) & stack pointer in SheepShaver mode only 2003-10-19 21:36:21 +00:00
gbeauche
9a05805a27 - Fix ADDME & ADDZE decoders, add RA==R0 testers 
- Increase predecode cache size to 32K entries
- Enable PPC_EXECUTE_DUMP_STATE for predecode cache as well
 2003-10-18 13:43:25 +00:00
gbeauche
1b9876889e - Record address range of block to invalidate. i.e. icbi records ranges 
and isync actually invalidate caches
 2003-10-12 06:44:04 +00:00
gbeauche
7e0dccc544 - Handle MakeExecutable() replacement 
- Disable predecode cache in CVS for now
- Fix flight recorder ordering in predecode cache mode
 2003-10-12 05:44:17 +00:00
gbeauche
a3036b0c9d Really enable flight_recorder with predecode cache on 2003-10-11 16:43:42 +00:00
gbeauche
7e20a8d205 - Add support for FLIGHT_RECORDER with predecode cache 
- Always enable predecode cache & flight recorder for now
 2003-10-11 09:57:52 +00:00
gbeauche
b05c68e90e Move PPC emulator config to here 2003-10-11 09:34:35 +00:00
gbeauche
ebb67f0421 - Minor optimization to execute_ppc() as we apparently don't need to move 
target PC into CTR.
- Fix breakage introduced during little endian fixing. We now assume that
  MacOS doesn't rely on any PPC register that may have been saved on top
  of it stack. i.e. register state is saved onto native stack.
 2003-10-11 09:33:27 +00:00
gbeauche
1012da75dd - Cleanups & make sure PPC emulator config is setup in sysdeps.h 
- Log r24 in SheepShaver mode as this represents the 68k emulator PC
 2003-10-11 09:03:03 +00:00
gbeauche
be50ff1b42 Adapt ROM patches space to Gossamer ROMs layout. Weird that it passed the 
other day.
 2003-10-07 19:28:09 +00:00
gbeauche
ad0aea0403 fix parcels decoder 2003-10-06 21:23:53 +00:00
gbeauche
0cb51c42dd cleanups :-) 2003-10-06 21:01:22 +00:00
gbeauche
974ebd5d91 - Add checks against ROM patches space 
- Make sure to also load the floppy disk driver with Gossamer ROMs so
  that exfs feature can work too
 2003-10-06 21:00:48 +00:00
gbeauche
c9b8dd6628 tm_task is actually correct for both nw & gossamer ROMs 2003-10-05 23:49:19 +00:00
gbeauche
84ce1f2b0d fix tm_task patch for Gossamer ROMs 2003-10-05 23:38:07 +00:00
gbeauche
3768573d35 Add support for Gossamer ROMs (DTG3) 2003-10-05 23:05:05 +00:00
gbeauche
19053d4992 little endian fixes, note that trampolines are still not 64-bit clean either 2003-09-29 22:50:31 +00:00
gbeauche
663b536257 Little endian fixes to Serial trampolines. 2003-09-29 22:49:23 +00:00
gbeauche
7ac3170cb4 More little endian fixes 2003-09-29 22:48:22 +00:00
gbeauche
aafd6e4898 Little endian fixes to FindLibSymbol(). This is not 64-bit clean and this 
needs to go through a more appropriate thunking mechanism.
 2003-09-29 22:47:39 +00:00
gbeauche
5229b42622 basic implementation for missing functions (signbit/isless/isgreater) in 
older C libraries
 2003-09-29 22:45:31 +00:00
gbeauche
1713a26a3f NULL is the null pointer to member function 2003-09-29 22:42:53 +00:00
gbeauche
792bef8e61 Make older & bogus compilers happy. aka. force "static" storage class 
for SPIN_LOCK_UNLOCKED constant.
 2003-09-29 22:41:50 +00:00
gbeauche
c7dd356f7f VSLNewInterruptService() returns a serviceID in big endian format 2003-09-29 20:31:47 +00:00
gbeauche
3d4ed54488 first round of little endian fixes 2003-09-29 20:30:21 +00:00
gbeauche
b8b139faf2 - Share EmulatorData & KernelData struct definitions 
- Introduce new SheepShaver data area for alternate stacks, thunks, etc.
- Experimental asynchronous interrupts handling. This improves performance
  by 30% but some (rare) lockups may occur. To be debugged!
 2003-09-29 15:46:09 +00:00
gbeauche
2d92ad6dfb spinlocks from QEMU 2003-09-29 08:27:56 +00:00
gbeauche
1c2fa89e31 use B2 sigsegv API instead of rewriting yet another sigsegv handler for x86 2003-09-29 07:05:15 +00:00
gbeauche
5b57fde6ce New NativeOps for DisableInterrupt() & EnableInterrupt(). 2003-09-28 21:27:55 +00:00
gbeauche
3851071ecd Try to handle XLM_IRQ_NEST atomically in emulated PPC views. Fix placement 
of fake SCSIGlobals (disabled for now). Switch back to mono core emulation
until things are debugged enough. Implement get_resource() et al.
 2003-09-28 21:27:34 +00:00
gbeauche
2a86a4f62a Handle dcbz. Ignore unaligned load/store multiple. Fix icbi/isync. 2003-09-28 21:22:59 +00:00
gbeauche
4e5e13d92d make do_execute() a template so that execution loop prologues/epilogues 
can be performed in derived engines
 2003-09-28 21:22:09 +00:00
gbeauche
2f13888ea8 plain interpretive mode for debugging purposes 2003-09-28 21:21:07 +00:00
gbeauche
28ae4b0028 Disable SIGUSR2 handler in EMULATED_PPC mode for now 2003-09-28 21:20:38 +00:00
gbeauche
9914de4a09 Define HAVE_PTHREADS, if available 2003-09-28 21:19:06 +00:00
gbeauche
2a756136e4 more tests 2003-09-21 22:13:09 +00:00
gbeauche
2cc3b4edab fix xoris 2003-09-21 21:45:05 +00:00
gbeauche
089247fcff Merge in cpu core: 
- make cache invalidation routines public
- fix shift instructions, especially for invalid shift counts
- fix mullwo to set overflow only if the product can't be represented in
  32 bits
 2003-09-15 22:48:57 +00:00
gbeauche
09c674f63a factor out -I usage 2003-09-14 22:11:42 +00:00
gbeauche
b5b471b4f1 add PowerPC emulator tester 2003-09-14 22:10:58 +00:00
gbeauche
fb8fbf71ed PowerPC emulator fixes: 
- make divw. behaviour more realistic (vs ppc 7410) when rB == 0
- fix carry/overflow computations to fix SUBFME handling
- fix nand duplicate with wrong operand
 2003-09-14 22:09:13 +00:00
gbeauche
cb1dd6dac5 - Integrate new NativeOp instructions to be used as trampolines to call 
native functions from ppc code.
- Little endian fixes in emul_op.cpp
- Add new 'gpch' 750 patch to workaround crash with MacOS 8.6
- Don't crash in Process Manager on reset/shutdown with MacOS 8.6
- We also have an experimental interrupt thread in emulation mode
 2003-09-07 14:33:54 +00:00
gbeauche
15a1208483 Handle new ppc emulator 2003-09-07 14:26:15 +00:00
gbeauche
6ff594e32d Handle manual updates with kpx_cpu core 2003-09-07 14:25:48 +00:00
gbeauche
029a7fd85b Merge in old kpx_cpu snapshot for debugging 2003-09-07 14:25:05 +00:00
gbeauche
10aa71cb58 Handle --enable-ppc-emulator. Add Kheperix cpu emulator to sources 2003-09-07 14:21:20 +00:00
gbeauche
3f9b589eea Add byteswap routines 2003-09-07 14:19:25 +00:00
gbeauche
9e7670c922 Import VOSF from Basilisk II for faster and more accurate video refresh. 
There may be some bugs left though. Rework sigsegv_handler() a little to
accomodate VOSF way of life.

TODO: merge video drivers infrastructure from B2.
 2003-05-22 22:12:05 +00:00
gbeauche
d29a00c17f Don't call FE0A opcode in Shutdown Manager: handle better NewWorld ROMs. 
i.e. don't force a "bra" if there was no "beq" beforehand.
 2003-05-21 19:31:57 +00:00
gbeauche
f47379e887 Force installation of floppy driver with NewWorld ROMs otherwise we fail 
to open it and further install ExtFS & NQD acceleration.
 2003-05-21 18:57:17 +00:00
gbeauche
dd4877eaf2 Fix import and call to IOCommandIsComplete() 2003-05-20 20:30:50 +00:00
gbeauche
5843470f9f Finally enable boot on MacOS 8.6 Update CD from iMac DV 
- Don't read PVR at ROM_BASE + 0x314600
- Generated code for FC1E and FE0A don't really match comments
- Move FC1E routine base to ROM_BASE + 0x36fb00
- Recognize iMacUpdate 1.1 ROM (nwrom v1.2.1)
 2003-05-17 08:42:34 +00:00
gbeauche
0e223c55a3 Correctly print offset to current parcel, not next 2003-05-14 22:11:59 +00:00
gbeauche
94ec8c82ca Use vm_acquire/vm_acquire_fixed/vm_release API. Prepare use of SIGSEGV 
handlers and instruction skippers. Fix test prior to including posix_sem.cpp.
 2003-05-13 16:59:57 +00:00
gbeauche
5bd60842d6 Make EmulOp() and check_load_invoc() extern "C" so that we are C++ name 
mangling independent for asm_linux.S
 2003-04-12 10:14:09 +00:00
gbeauche
43f1cdb401 Sync with changes from cxmon and B2. I have yet to find out why my old 
disk image (8.1 based) no longer boots completely. :-/
 2003-01-04 12:23:39 +00:00
gbeauche
def097803e - B2_TOPDIR: new macro specifying where Basilisk II directory can be found. 
Update "links" rule to take care of it and don't PREFIX with current path
  if B2_TOPDIR yields an absolute path.
  (Simply cosmetic so that I can have multiple SS work dirs, effortlessly ;-)
 2002-05-09 09:55:45 +00:00
gbeauche
665c64b4aa Add support to decode parcels-based ROMs 
- include/rom_patches.h (DecodeROM): Declare.
- rom_patches.cpp (DecodeROM): Define.
- Unix/main_unix.cpp, BeOS/main_beos.cpp (decode_lzss): Move to...
- rom_patches.cpp (decode_lzss): ... here.
- Unix/main_unix.cpp (main): Call DecodeROM().
- BeOS/main_beos.cpp (SheepShaver::load_rom): Call DecodeROM().
 2002-04-21 15:07:09 +00:00
gbeauche
05d3e990a5 - Do match APPLE_16_BIT to the underlying X depth (either 15 or 16 bpp) 2002-04-21 11:47:18 +00:00
gbeauche
e89d481489 Match changes from glibc 2.2 (?) 
- #define status as __status
- #define spinlock as __spinlock
 2002-04-21 11:42:30 +00:00
gbeauche
d1b8e62cc9 - Invert AC_CHECK_LIB for readline and termcap so that the test program 
for readline detection is actually linked against -ltermcap -lreadline.
  Also add other term libs and finally prefer ncurses over the rest.
 2002-04-21 11:21:26 +00:00
cebix
b7e0269519 added dummy Set_pthread_attr() 2002-02-21 15:12:12 +00:00
cebix
8e4d5e5f40 Imported sources 2002-02-04 16:58:13 +00:00