* Converted Z80 to use emulator-hal traits
* Updated emulator-hal
* Added a hacky Signalable trait to replace the Z80 signals
* Minor fixes
* Fixed timing tests and added no io tests option
* Fixed genesis Z80 bus issue
* Fixed addressing for BusAccess impl of Z80
* Fixed tests and clippy lints
* Added github actions for PRs
* Added some rustfmt::skip attributes
* Applied formatting
* Added rustfmt component in action
* Configured to use rustfmt version 2 which fixes some comment formatting
* Removed ready_for_review condition for github actions
Since it has the synchronize condition, it will update after each
commit, whether in draft or not, so I think this should be alright
I'm trying to extract the memory/bus interface, and pass it in at
the start of each cycle instead of having the BusPort permanently
embedded, which will allow migrating to emulator-hal.
The functional way would be argument drilling; passing an extra argument
to each function in the entire execution core. The problem is that it's
messy, so a solution that is still functional is to implement all of the
execution logic on a newtype that contains a reference to the mutable
state and the owned cycle data, and at the end of the cycle, decompose
the M68kCycleGuard that holds the reference, and keep the cycle data for
debugging purposes.
The debug loop that reads a command and does something is part of the
frontend's main loop, so that it can potentially update, even though
it doesn't actually work for minifb because the command input is a
blocking call. It's also not implemented in the pixels frontend.
At some point I'll make a web frontend.
