2021-07-22 22:43:07 +00:00
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//
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// Blitter.hpp
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// Clock Signal
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//
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// Created by Thomas Harte on 22/07/2021.
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// Copyright © 2021 Thomas Harte. All rights reserved.
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//
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#ifndef Blitter_hpp
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#define Blitter_hpp
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#include <cstddef>
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#include <cstdint>
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2022-08-06 18:40:12 +00:00
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#include <string>
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2022-08-06 13:51:20 +00:00
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#include <vector>
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2021-07-22 22:43:07 +00:00
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#include "../../ClockReceiver/ClockReceiver.hpp"
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2021-09-15 00:51:32 +00:00
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#include "DMADevice.hpp"
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namespace Amiga {
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2022-07-27 02:01:43 +00:00
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/*!
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Statefully provides the next access the Blitter should make.
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TODO: determine the actual logic here, rather than
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relying on tables.
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*/
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2022-07-26 21:05:05 +00:00
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class BlitterSequencer {
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public:
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enum class Channel {
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/// Tells the caller to calculate and load a new piece of output
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/// into the output pipeline.
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///
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/// If any inputs are enabled then a one-slot output pipeline applies:
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/// output will rest in the pipeline for one write phase before being written.
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Write,
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/// Indicates that a write should occur if anything is in the pipeline, otherwise
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/// no activity should occur.
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FlushPipeline,
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/// The caller should read from channel C.
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C,
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/// The caller should read from channel B.
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B,
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/// The caller should read from channel A.
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A,
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/// Indicates an unused DMA slot.
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None
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};
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/// Sets the current control value, which indicates which
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/// channels are enabled.
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void set_control(int control) {
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control_ = control & 0xf;
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index_ = 0; // TODO: this probably isn't accurate; case caught is a change
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// of control values during a blit.
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}
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/// Indicates that blitting should conclude after this step, i.e.
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/// whatever is being fetched now is part of the final set of input data;
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/// this is safe to call following a fetch request on any channel.
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void complete() {
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next_phase_ =
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(control_ == 0x9 || control_ == 0xb || control_ == 0xd) ?
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Phase::PauseAndComplete : Phase::Complete;
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}
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/// Begins a blit operation.
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void begin() {
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phase_ = next_phase_ = Phase::Ongoing;
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index_ = loop_ = 0;
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}
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/// Provides the next channel to fetch from, or that a write is required,
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/// along with a count of complete channel iterations so far completed.
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std::pair<Channel, int> next() {
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switch(phase_) {
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default: break;
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case Phase::Complete:
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return std::make_pair(Channel::FlushPipeline, loop_);
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case Phase::PauseAndComplete:
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phase_ = Phase::Complete;
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return std::make_pair(Channel::None, loop_);
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}
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Channel next = Channel::None;
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switch(control_) {
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default: break;
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2022-07-31 00:13:37 +00:00
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case 0: next = next_channel(pattern0); break;
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case 1: next = next_channel(pattern1); break;
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case 2: next = next_channel(pattern2); break;
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case 3: next = next_channel(pattern3); break;
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case 4: next = next_channel(pattern4); break;
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case 5: next = next_channel(pattern5); break;
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case 6: next = next_channel(pattern6); break;
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case 7: next = next_channel(pattern7); break;
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case 8: next = next_channel(pattern8); break;
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case 9: next = next_channel(pattern9); break;
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case 10: next = next_channel(patternA); break;
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case 11: next = next_channel(patternB); break;
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case 12: next = next_channel(patternC); break;
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case 13: next = next_channel(patternD); break;
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case 14: next = next_channel(patternE); break;
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case 15: next = next_channel(patternF); break;
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}
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return std::make_pair(next, loop_);
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}
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2022-08-04 14:06:14 +00:00
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template <int channel> bool channel_enabled() {
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return control_ & (8 >> channel);
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}
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private:
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static constexpr std::array<Channel, 1> pattern0 = { Channel::None };
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static constexpr std::array<Channel, 2> pattern1 = { Channel::Write, Channel::None };
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static constexpr std::array<Channel, 2> pattern2 = { Channel::C, Channel::None };
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static constexpr std::array<Channel, 3> pattern3 = { Channel::C, Channel::Write, Channel::None };
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static constexpr std::array<Channel, 3> pattern4 = { Channel::B, Channel::None, Channel::None };
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static constexpr std::array<Channel, 3> pattern5 = { Channel::B, Channel::Write, Channel::None };
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static constexpr std::array<Channel, 3> pattern6 = { Channel::B, Channel::C, Channel::None };
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static constexpr std::array<Channel, 4> pattern7 = { Channel::B, Channel::C, Channel::Write, Channel::None };
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static constexpr std::array<Channel, 2> pattern8 = { Channel::A, Channel::None };
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static constexpr std::array<Channel, 2> pattern9 = { Channel::A, Channel::Write };
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static constexpr std::array<Channel, 2> patternA = { Channel::A, Channel::C };
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static constexpr std::array<Channel, 3> patternB = { Channel::A, Channel::C, Channel::Write };
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static constexpr std::array<Channel, 3> patternC = { Channel::A, Channel::B, Channel::None };
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static constexpr std::array<Channel, 3> patternD = { Channel::A, Channel::B, Channel::Write };
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static constexpr std::array<Channel, 3> patternE = { Channel::A, Channel::B, Channel::C };
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static constexpr std::array<Channel, 4> patternF = { Channel::A, Channel::B, Channel::C, Channel::Write };
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template <typename ArrayT> Channel next_channel(const ArrayT &list) {
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loop_ += index_ / list.size();
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index_ %= list.size();
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const Channel result = list[index_];
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++index_;
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if(index_ == list.size()) {
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phase_ = next_phase_;
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}
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return result;
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}
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// Current control flags, i.e. which channels are enabled.
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int control_ = 0;
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// Index into the pattern table for this blit.
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size_t index_ = 0;
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// Number of times the entire pattern table has been completed.
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int loop_ = 0;
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enum class Phase {
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/// Return the next thing in the pattern table and advance.
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/// If looping from the end of the pattern table to the start,
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/// set phase_ to next_phase_.
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Ongoing,
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/// Return a Channel::None and advancce to phase_ = Phase::Complete.
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PauseAndComplete,
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/// Return Channel::Write indefinitely.
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Complete
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};
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// Current sequencer pahse.
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Phase phase_ = Phase::Complete;
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// Phase to assume at the end of this iteration of the sequence table.
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Phase next_phase_ = Phase::Complete;
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};
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2022-08-06 13:51:20 +00:00
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/*!
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If @c record_bus is @c true then all bus interactions will be recorded
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and can subsequently be retrieved. This is included for testing purposes.
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*/
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template <bool record_bus = false> class Blitter: public DMADevice<4, 4> {
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public:
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using DMADevice::DMADevice;
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// Various setters; it's assumed that address decoding is handled externally.
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//
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// In all cases where a channel is identified numerically, it's taken that
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// 0 = A, 1 = B, 2 = C, 3 = D.
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void set_control(int index, uint16_t value);
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void set_first_word_mask(uint16_t value);
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void set_last_word_mask(uint16_t value);
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2021-08-10 11:17:01 +00:00
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2021-07-22 22:43:07 +00:00
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void set_size(uint16_t value);
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void set_minterms(uint16_t value);
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// void set_vertical_size(uint16_t value);
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// void set_horizontal_size(uint16_t value);
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void set_data(int channel, uint16_t value);
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uint16_t get_status();
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2021-11-13 20:53:41 +00:00
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bool advance_dma();
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struct Transaction {
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enum class Type {
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SkippedSlot,
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ReadA,
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ReadB,
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ReadC,
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AddToPipeline,
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WriteFromPipeline
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} type = Type::SkippedSlot;
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uint32_t address = 0;
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uint16_t value = 0;
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Transaction() {}
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Transaction(Type type) : type(type) {}
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Transaction(Type type, uint32_t address, uint16_t value) : type(type), address(address), value(value) {}
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std::string to_string() const {
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std::string result;
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switch(type) {
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case Type::SkippedSlot: result = "SkippedSlot"; break;
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case Type::ReadA: result = "ReadA"; break;
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case Type::ReadB: result = "ReadB"; break;
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case Type::ReadC: result = "ReadC"; break;
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case Type::AddToPipeline: result = "AddToPipeline"; break;
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case Type::WriteFromPipeline: result = "WriteFromPipeline"; break;
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}
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result += " address:" + std::to_string(address) + " value:" + std::to_string(value);
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return result;
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}
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};
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std::vector<Transaction> get_and_reset_transactions();
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private:
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int width_ = 0, height_ = 0;
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int shifts_[2]{};
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uint16_t a_mask_[2] = {0xffff, 0xffff};
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2021-09-23 22:38:37 +00:00
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bool line_mode_ = false;
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bool one_dot_ = false;
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int line_direction_ = 0;
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int line_sign_ = 1;
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2021-09-23 22:38:37 +00:00
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uint32_t direction_ = 1;
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2021-09-29 02:11:58 +00:00
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bool inclusive_fill_ = false;
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bool exclusive_fill_ = false;
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bool fill_carry_ = false;
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2021-09-23 22:38:37 +00:00
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uint8_t minterms_ = 0;
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uint32_t a32_ = 0, b32_ = 0;
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uint16_t a_data_ = 0, b_data_ = 0, c_data_ = 0;
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2021-09-21 03:08:26 +00:00
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2021-10-29 01:12:46 +00:00
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bool not_zero_flag_ = false;
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2022-07-29 20:15:18 +00:00
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BlitterSequencer sequencer_;
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uint32_t write_address_ = 0xffff'ffff;
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uint16_t write_value_ = 0;
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enum WritePhase {
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Starting, Full
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} write_phase_;
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int y_, x_;
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uint16_t transient_a_mask_;
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2022-07-31 00:34:37 +00:00
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bool busy_ = false;
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int loop_index_ = -1;
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2022-07-31 01:35:26 +00:00
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2022-08-07 23:15:03 +00:00
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int error_ = 0;
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bool draw_ = false;
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2022-07-31 01:35:26 +00:00
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void add_modulos();
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2022-08-06 13:51:20 +00:00
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std::vector<Transaction> transactions_;
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};
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}
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#endif /* Blitter_hpp */
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