Thomas Harte
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5456a4a39d
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Eliminates static where constexpra aren't class members; adds some if constexprs for clarity.
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2019-12-22 13:42:24 -05:00 |
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Thomas Harte
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274867579b
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Deploys constexpr as a stricter const.
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2019-12-22 00:22:17 -05:00 |
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Thomas Harte
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1c154131f9
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Expands size of storage in Cycles/HalfCycles; adjusts widely to compensate.
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2019-10-29 22:36:29 -04:00 |
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Thomas Harte
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1d790ec2a9
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Adds the option for a clock conversion to JustInTimeActor and slows the MFP's clock rate.
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2019-10-28 21:35:10 -04:00 |
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Thomas Harte
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c4ef33b23f
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JustInTimeActors can now specify a clock divider.
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2019-10-20 20:38:55 -04:00 |
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Thomas Harte
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077c7d767f
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Shifts essential modifiers up to the Keyboard class.
I had forgotten that mappers are not exposed.
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2019-09-22 13:48:50 -04:00 |
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Thomas Harte
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5f16fa8c08
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Removes dead reference to video from VIAPortHandler.
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2019-09-21 17:39:45 -04:00 |
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Thomas Harte
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e7bf0799b6
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Implements every-other-cycle-during-pixels RAM timing.
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2019-09-21 17:25:20 -04:00 |
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Thomas Harte
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2e24da4614
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Implements quick booting, and edges towards exposing it on the Mac.
It should already work in kiosk mode.
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2019-09-19 22:32:12 -04:00 |
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Thomas Harte
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e46601872b
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Establishes that the Macintosh offers the quick-boot option.
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2019-09-19 21:50:39 -04:00 |
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Thomas Harte
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776b819a5a
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Adds the SCSI bus as an Activity::Source.
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2019-09-19 19:31:22 -04:00 |
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Thomas Harte
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962275c22a
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Removes clock for NCR 5380.
It doesn't have one in real life, and now can live off the time counting that occurs on the SCSI bus.
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2019-09-18 20:17:47 -04:00 |
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Thomas Harte
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243e40cd79
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Adds signalling of DACK.
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2019-09-14 13:48:33 -04:00 |
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Thomas Harte
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1c7e0f3c9d
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Fixes control line modification by the 5380 and SCSI target command chaining.
So now I'm back to trying to guess how a SCSI command terminates re: the relative meanings of a message phase and a status phase.
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2019-09-02 23:14:37 -04:00 |
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Thomas Harte
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318cdb41ea
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Adds SCSI bus clocking to the Macintosh, and fixes its internal counting.
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2019-09-02 16:03:33 -04:00 |
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Thomas Harte
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2f8e31bc8b
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Takes a first bash at implementing the new SCSI::Bus timing infrastructure.
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2019-09-02 13:00:01 -04:00 |
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Thomas Harte
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1a60ced61b
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Starts trying to deal with creating a whole volume from merely a partition.
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2019-08-25 23:03:54 -04:00 |
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Thomas Harte
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ca08716c52
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Introduces real hard disk images to the nascent world of SCSI.
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2019-08-25 17:03:41 -04:00 |
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Thomas Harte
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f668e4a54c
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Makes an attempt at getting the 5380 past arbitration.
Not entirely successful. Also gets a bit smarter with `final` on ClockingHint::Sources.
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2019-08-15 23:14:40 -04:00 |
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Thomas Harte
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0f67e490e8
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Adjusts NCR address decoding to produce a more plausible initial interaction.
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2019-08-11 22:43:25 -04:00 |
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Thomas Harte
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895c315fa5
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Increases the Mac Plus too 4mb.
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2019-08-11 21:41:12 -04:00 |
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Thomas Harte
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a90a74a512
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Stubs in just enough of the 5380 to get a Mac Plus too boot.
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2019-08-11 20:55:20 -04:00 |
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Thomas Harte
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bbd4e4d3dc
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Enhances memory map fidelity to allow for ROM holes on the Mac Plus.
This is how the ROM detects the difference between the Plus and the 512ke, it seems.
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2019-08-10 23:53:34 -04:00 |
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Thomas Harte
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bac0461f7f
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Switches the drive-speed accumulator to the delegate pattern.
This allows the Macintosh to ensure that the IWM is kept up just-in-time with drive speed changes.
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2019-08-07 21:39:23 -04:00 |
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Thomas Harte
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f26a200d78
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Switches to a JustInTimeActor to wrap the IWM.
Also simplifies potential future usage of the IWM template.
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2019-08-07 21:28:02 -04:00 |
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Thomas Harte
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0e293e4983
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Relocates RAM delay test in order to scrape out a minor performance win.
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2019-08-03 21:46:45 -04:00 |
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Thomas Harte
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478f2533b5
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Corrects 68000 address bus during interrupt acknowledge.
All unused bits should be 1, not 0.
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2019-08-03 15:38:36 -04:00 |
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Thomas Harte
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a07488cf1b
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Introduces the Mac Plus memory map.
Albeit with no SCSI support yet.
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2019-08-02 22:26:40 -04:00 |
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Thomas Harte
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d67c5145c0
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Introduces RAM access delays.
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2019-08-02 22:12:34 -04:00 |
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Thomas Harte
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5e76d593af
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Switches to table-based address decoding.
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2019-08-02 21:30:04 -04:00 |
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Thomas Harte
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b93f9b3973
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Distinguishes time advancement from bus response.
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2019-08-02 19:48:41 -04:00 |
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Thomas Harte
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96005261c7
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Adds activity lights for Macintosh disk activity.
Prompting a quick fix to drives not spinning down.
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2019-08-02 16:26:23 -04:00 |
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Thomas Harte
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74c18d7861
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Attempts a full wiring up of 400kb drive speed.
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2019-07-30 15:08:55 -04:00 |
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Thomas Harte
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a43ada82b2
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Experiments with a JustInTimeActor in the Master System.
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2019-07-29 15:38:41 -04:00 |
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Thomas Harte
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5149f290d0
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Starts trying to formalise just-in-time execution.
Which, at least, simplifies Cycle/HalfCycle to Cycle run_for usage via template.
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2019-07-28 21:49:54 -04:00 |
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Thomas Harte
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f894d43111
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Removes the video and audio base address latches.
It now seems to me that these take effect immediately.
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2019-07-27 22:23:40 -04:00 |
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Thomas Harte
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d8bc20b1ab
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Ensures quieter Release behaviour.
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2019-07-25 22:55:27 -04:00 |
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Thomas Harte
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109d5d16bd
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Withdraws optimisation, for further testing in the future.
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2019-07-25 10:33:38 -04:00 |
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Thomas Harte
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1672dc5946
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Reduces frequency of update_video() calls.
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2019-07-25 10:14:52 -04:00 |
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Thomas Harte
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0469f0240b
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Moves interrupt level selection outside the loop.
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2019-07-23 23:13:03 -04:00 |
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Thomas Harte
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2432151bf8
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Puts machine name into ROMMachine::ROM.
Also switches to idiomatic exit codes.
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2019-07-22 21:14:21 -04:00 |
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Thomas Harte
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3c68a5ca65
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Enhances the amount of ROM information posted by the Apple machines.
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2019-07-20 16:08:40 -04:00 |
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Thomas Harte
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22ee51c12c
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Corrects clocking issues around audio, and cuts down queue costs.
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2019-07-17 14:41:36 -04:00 |
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Thomas Harte
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59b5dfddec
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Added logic to allow a second disk to be inserted, at least.
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2019-07-11 23:03:02 -04:00 |
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Thomas Harte
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cac97a9663
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Devolves drive responsibility.
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2019-07-10 22:39:56 -04:00 |
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Thomas Harte
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2ccb564a7b
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Throws some extra logging into place, to test the IWM changeover.
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2019-07-10 21:39:45 -04:00 |
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Thomas Harte
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d1d0430fce
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Eliminates the SonyDrive class.
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2019-07-10 17:38:05 -04:00 |
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Thomas Harte
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be251d6b03
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Begins substituting the DoubleDensityDrive for the Sony.
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2019-07-10 16:24:48 -04:00 |
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Thomas Harte
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886946cc8c
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Rejigs time-until-event tracking.
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2019-07-09 23:27:27 -04:00 |
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Thomas Harte
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ed4ddcfda8
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Reduces call/return overhead on Microcycle methods.
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2019-07-09 19:55:30 -04:00 |
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