Thomas Harte
|
1defeca1ad
|
Implement RTS, RTR, RTE.
|
2022-05-06 12:30:49 -04:00 |
|
Thomas Harte
|
ac6a9ab631
|
Fix TAS Dn.
|
2022-05-06 12:23:04 -04:00 |
|
Thomas Harte
|
8176bb6f79
|
Expose issues with TST and TAS.
|
2022-05-06 12:18:56 -04:00 |
|
Thomas Harte
|
9c266d4316
|
Proceed to unimplemented TST.
|
2022-05-06 11:33:57 -04:00 |
|
Thomas Harte
|
d478a1b448
|
Proceed to next failure: PEA.
|
2022-05-06 10:04:20 -04:00 |
|
Thomas Harte
|
190a351a29
|
Fix address writeback.
|
2022-05-06 09:56:01 -04:00 |
|
Thomas Harte
|
607ddd2f78
|
Preserve MOVEM order in Operation .
|
2022-05-06 09:45:06 -04:00 |
|
Thomas Harte
|
fed79a116f
|
Be overt about the size being described here.
|
2022-05-06 09:22:38 -04:00 |
|
Thomas Harte
|
5db0ea0236
|
Add note for my tomorrow self.
|
2022-05-05 21:11:02 -04:00 |
|
Thomas Harte
|
06fe320cc0
|
Correct source counting, but this leaves the operands still being the wrong way around.
|
2022-05-05 21:06:53 -04:00 |
|
Thomas Harte
|
f7991e18de
|
Makes a failed attempt to implement MOVEM to registers.
|
2022-05-05 20:32:21 -04:00 |
|
Thomas Harte
|
d7d0a5c15e
|
Implement MOVEM to memory.
|
2022-05-05 18:51:29 -04:00 |
|
Thomas Harte
|
47f4bbeec6
|
Switch to a contiguous block of 16 registers.
|
2022-05-05 15:31:59 -04:00 |
|
Thomas Harte
|
9ab70b340c
|
Route MOVEM appropriately.
|
2022-05-05 12:42:57 -04:00 |
|
Thomas Harte
|
70cdc2ca9f
|
Fix MOVEP to register.
Advance to lack of MOVEM.
|
2022-05-05 12:37:47 -04:00 |
|
Thomas Harte
|
f63a872387
|
BTST does not write back.
|
2022-05-05 12:32:15 -04:00 |
|
Thomas Harte
|
67462c2f92
|
Rewire MOVEP.
|
2022-05-05 12:27:36 -04:00 |
|
Thomas Harte
|
4a4e786060
|
Hit a realisation: write-back isn't going to work with MOVEP as formulated.
|
2022-05-05 09:26:26 -04:00 |
|
Thomas Harte
|
665f2d4c00
|
Attempts MOVEP.
|
2022-05-05 09:00:33 -04:00 |
|
Thomas Harte
|
64586ca7ba
|
Implement BTST/etc.
|
2022-05-04 20:57:22 -04:00 |
|
Thomas Harte
|
46686b4b9c
|
Start testing move.
|
2022-05-04 20:38:56 -04:00 |
|
Thomas Harte
|
15c90e546f
|
Fix rotates and shifts to memory.
|
2022-05-04 19:44:59 -04:00 |
|
Thomas Harte
|
5aabe01b6d
|
Mostly fix LINK and UNLK.
|
2022-05-04 08:41:55 -04:00 |
|
Thomas Harte
|
5d1d94848c
|
Take a bash at LINK and UNLK.
|
2022-05-04 08:26:11 -04:00 |
|
Thomas Harte
|
7d10976e08
|
Add LINK and UNLINK to operand_flags .
|
2022-05-03 20:51:02 -04:00 |
|
Thomas Harte
|
d3b55a74a5
|
Fix LEA, proceed to non-functional LINK and UNLK.
|
2022-05-03 20:45:36 -04:00 |
|
Thomas Harte
|
de58ec71fd
|
Fix EXT, SWAP.
|
2022-05-03 20:17:36 -04:00 |
|
Thomas Harte
|
052ba80fd7
|
Add enough wiring to complete but fail EXT and JMP/JSR.
|
2022-05-03 15:49:55 -04:00 |
|
Thomas Harte
|
39f0ec7536
|
Get far enough through CHK to realise that MOVEM probably needs to be divided by direction.
|
2022-05-03 15:40:04 -04:00 |
|
Thomas Harte
|
af973138df
|
Correct decoding of Bcc.b, satisfying Bcc and BSR tests.
|
2022-05-03 15:32:54 -04:00 |
|
Thomas Harte
|
5a87506f3d
|
Fix Bcc, making decision that add_pc is relative to start of instruction.
|
2022-05-03 15:21:42 -04:00 |
|
Thomas Harte
|
90f0005cf2
|
Proceed to failing Bcc and flagging up my lack of an implementation for BSR.
|
2022-05-03 14:45:49 -04:00 |
|
Thomas Harte
|
d8b3748d24
|
Fix Scc size, DBcc behaviour.
|
2022-05-03 14:40:51 -04:00 |
|
Thomas Harte
|
1b224c961e
|
Fix Scc, add operand flags for DBcc.
|
2022-05-03 14:23:57 -04:00 |
|
Thomas Harte
|
b6ffff5bbd
|
Distinguish [ADD/SUB]QA from [ADD/SUB]Q.
|
2022-05-03 14:17:26 -04:00 |
|
Thomas Harte
|
5ebae85a16
|
Start recording successes.
|
2022-05-03 11:28:50 -04:00 |
|
Thomas Harte
|
b3cf13775b
|
Consume operand_flags into Instruction.hpp.
|
2022-05-03 11:09:57 -04:00 |
|
Thomas Harte
|
c61809f0c4
|
Add CMPAl .
|
2022-05-03 09:20:02 -04:00 |
|
Thomas Harte
|
2f2d6bc08b
|
Correct CMPw.
|
2022-05-03 09:05:34 -04:00 |
|
Thomas Harte
|
1bb809098c
|
Switch — messily — to a more compact way of indicating sequence.
|
2022-05-03 09:04:54 -04:00 |
|
Thomas Harte
|
17a2ce0464
|
Fix missung #undefs.
|
2022-05-02 21:29:46 -04:00 |
|
Thomas Harte
|
011506f00d
|
Add basic exceptions.
|
2022-05-02 21:27:58 -04:00 |
|
Thomas Harte
|
25ab478461
|
Fix immediate byte and word fetches.
|
2022-05-02 20:17:44 -04:00 |
|
Thomas Harte
|
fc9a35dd04
|
Test add/sub, add an exception for invalid Sequence s.
|
2022-05-02 20:09:38 -04:00 |
|
Thomas Harte
|
7efe30f34c
|
Fix (d8, _, Xn) calculation.
|
2022-05-02 15:09:59 -04:00 |
|
Thomas Harte
|
ef28d5512b
|
Annotate further.
|
2022-05-02 12:58:04 -04:00 |
|
Thomas Harte
|
3827ecd6d3
|
Proceed to complete test running.
|
2022-05-02 12:57:45 -04:00 |
|
Thomas Harte
|
fa49737538
|
Correct processor name.
|
2022-05-02 08:40:47 -04:00 |
|
Thomas Harte
|
14532867a4
|
Sneaks towards testing EXT.
|
2022-05-02 08:00:56 -04:00 |
|
Thomas Harte
|
73f340586d
|
Proceed to building, but failing tests.
|
2022-05-02 07:45:07 -04:00 |
|