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Author	SHA1	Message	Date
Thomas Harte	1f19141746	Eliminate BiggerInt.	2022-10-11 16:19:47 -04:00
Thomas Harte	28093196b9	Convert DIVU/DIVS logic to a template.	2022-10-11 16:16:53 -04:00
Thomas Harte	eb206a08d9	Templatise MULU/MULS.	2022-10-11 16:02:20 -04:00
Thomas Harte	b2f005da1b	Collapse SR/CCR bitwise operations into a template.	2022-10-11 15:53:11 -04:00
Thomas Harte	8305a3b46a	Consolidate compare logic.	2022-10-11 12:57:02 -04:00
Thomas Harte	f3f23f90a3	Consolidate repetition in CLR.	2022-10-11 11:22:34 -04:00
Thomas Harte	77bc60bf86	Consolidate BCLR, BCHG and BSET into a macro.	2022-10-11 10:47:55 -04:00
Thomas Harte	ec5d57fefe	Eliminate 64-bit work.	2022-10-11 10:33:28 -04:00
Thomas Harte	58396f0c52	Perform a prima facie conversion of ADD/SUB[/X] from macros to templates.	2022-10-10 22:21:13 -04:00
Thomas Harte	c0377f074f	Merge pull request #1095 from TomHarte/XcodeUpdate ... macOS: enable dead code stripping; allow Xcode 14 to tag.	2022-09-16 22:05:16 -04:00
Thomas Harte	4d3221fc55	Enable dead code stripping; allow Xcode 14 to tag.	2022-09-16 19:53:36 -04:00
Thomas Harte	59388230a6	Record new macOS version number.	2022-09-16 16:14:59 -04:00
Thomas Harte	1ba4363802	Merge pull request #1094 from TomHarte/AppleIIDecoding ... Resolve off-by-one error in Apple II sector decoding.	2022-09-16 16:04:00 -04:00
Thomas Harte	d17fadbe0b	Avoid off-by-one error in sector decoding. ... Specific issue: retaining the 256 bytes up to _and including_ the checksum, rather than excluding.	2022-09-16 15:47:38 -04:00
Thomas Harte	9cba56237d	Upgrade to constexpr.	2022-09-16 15:46:09 -04:00
Thomas Harte	ea9411b21c	Breakup line, for easier debugging.	2022-09-16 15:43:23 -04:00
Thomas Harte	38e85a340a	Merge pull request #1085 from TomHarte/AppleIISCSI ... Support SCSI drives on the Apple II	2022-09-15 16:52:45 -04:00
Thomas Harte	fea8fecf11	Continue DMA requests if writing, even after a phase mismatch.	2022-09-15 16:46:22 -04:00
Thomas Harte	c4091a4cdb	Fix address mapping, implement write.	2022-09-15 16:39:19 -04:00
Thomas Harte	d826532031	Read proper file contents.	2022-09-15 16:34:20 -04:00
Thomas Harte	beca7a01c2	Treat a phase mismatch as ending DMA.	2022-09-15 16:34:06 -04:00
Thomas Harte	2d8e260671	Take a shot at the phase mismatch IRQ.	2022-09-15 16:24:06 -04:00
Thomas Harte	04f5d29ed9	Improve logging, factor out phase_matches per TODO comment.	2022-09-15 16:14:14 -04:00
Thomas Harte	5ed60f9153	Mark get_state as const.	2022-09-15 16:13:54 -04:00
Thomas Harte	2f78a1c7af	Add SCSI controller inclusion logic.	2022-09-15 12:17:50 -04:00
Thomas Harte	dc35ec8fa0	Merge branch 'master' into AppleIISCSI	2022-09-15 12:05:58 -04:00
Thomas Harte	7e3dbbbf0a	Merge pull request #1093 from TomHarte/IIgsFill ... Apple IIgs: better spell out shadowing logic.	2022-09-13 16:45:49 -04:00
Thomas Harte	0f017302ce	Fix tests.	2022-09-13 16:33:44 -04:00
Thomas Harte	36c3cb1f70	Deal with pre-ROM03 case, now that it's easy.	2022-09-13 16:31:06 -04:00
Thomas Harte	6773a321c1	Switch to portable direct bitwise logic.	2022-09-13 16:02:49 -04:00
Thomas Harte	ffdf44ad4f	Switch to overt use of std::fill.	2022-09-13 15:39:17 -04:00
Thomas Harte	cb7f1e42ff	Merge pull request #1091 from TomHarte/65816DxDy ... Fix 65816 direct, [x/y] addressing when E=1, DL != 0.	2022-09-09 16:57:10 -04:00
Thomas Harte	84a6c89a92	Merge pull request #1092 from TomHarte/68kWarning ... Avoid returning without value in release builds.	2022-09-09 16:54:46 -04:00
Thomas Harte	451b730c8e	Avoid returning without value in release builds.	2022-09-09 16:48:12 -04:00
Thomas Harte	98d3da62b5	Apply E mode wrap for d,x and d,y only when DL = 0.	2022-09-09 16:02:35 -04:00
Thomas Harte	45dc99fb9d	Further improve exposition.	2022-09-09 15:48:25 -04:00
Thomas Harte	2edbbfbe37	Merge pull request #1090 from TomHarte/68000Tests ... Add 68000 regression test generator.	2022-09-08 20:10:56 -04:00
Thomas Harte	dad1d7744e	Disable test generation.	2022-09-08 16:41:10 -04:00
Thomas Harte	de8ce3380c	Record only 8 bits for byte accesses.	2022-09-06 20:49:45 -04:00
Thomas Harte	b848b1389a	Include gaps in captured transactions, better collect final RAM state.	2022-09-06 15:08:35 -04:00
Thomas Harte	2c44ddfa95	Better bucket, and attempt to cover exceptions.	2022-09-06 11:26:38 -04:00
Thomas Harte	72b6ab4389	Provide a route to operation that factors in addressing mode.	2022-09-06 11:26:16 -04:00
Thomas Harte	1a7509e860	Properly announce ::SameAddress.	2022-09-05 22:26:45 -04:00
Thomas Harte	0fe94b2e6d	Capture ::SameAddress versus ::NewAddress, for TAS recognition.	2022-09-05 22:26:30 -04:00
Thomas Harte	93c1f7fc90	Include prefetch in 68000 state.	2022-09-05 22:00:04 -04:00
Thomas Harte	b6da1019bd	Bucket tests by operation, aim for ~1,000,000 total.	2022-09-05 21:52:48 -04:00
Thomas Harte	effe8c102d	Provide a direct to_string on Operation.	2022-09-05 21:52:20 -04:00
Thomas Harte	cee3f78059	Attempt to output only relevant RAM.	2022-09-03 15:45:06 -04:00
Thomas Harte	68f810883d	Begin process of creating on-disk tests.	2022-09-02 16:52:27 -04:00
Thomas Harte	cbfd8e18e8	Eliminate repetitive magic constants.	2022-09-02 15:54:16 -04:00