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2e4652209b
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Author SHA1 Message Date
Thomas Harte
2e4652209b Remove entire RESET sequence, move to testing PEA. 2022-06-10 15:57:54 -04:00
Thomas Harte
aec4bf9d45 Correct TAS timing. 2022-06-10 15:57:35 -04:00
Thomas Harte
e2d811a7a0 Notarise digressions that appear to be correct, remove now-working RTE/RTR. 2022-06-09 21:48:15 -04:00
Thomas Harte
f8643a62e6 Change RTE and RTR read order. 2022-06-09 21:47:28 -04:00
Thomas Harte
dd5c903fd6 DIVS also appears sometimes to differ. 2022-06-09 20:19:39 -04:00
Thomas Harte
2e1675066d Reinstate address error non-testing. 2022-06-09 16:59:06 -04:00
Thomas Harte
be84ce657b Add an optional testing whitelist. 2022-06-09 16:18:04 -04:00
Thomas Harte
64053d697f Take improved guess at address error stacking order. 2022-06-09 16:17:09 -04:00
Thomas Harte
a59ad06438 Print out summary of failure. 2022-06-09 13:13:33 -04:00
Thomas Harte
5af03d74ec Add note to self about first diagnosis. 2022-06-09 12:21:39 -04:00
Thomas Harte
ba2803c807 Include all bus activity after the split. 2022-06-09 11:30:22 -04:00
Thomas Harte
fdcbf617d8 Avoid STOP. 2022-06-09 08:42:31 -04:00
Thomas Harte
cc7a4f7f91 Fix test build. 2022-06-08 21:15:11 -04:00
Thomas Harte
2e42bda0a3 Permit instructions that end in an address error to differ in transactions. 2022-06-08 16:15:33 -04:00
Thomas Harte
da8e6737c6 Fix standard exception stack write order. 2022-06-08 16:15:11 -04:00
Thomas Harte
670201fcc2 Reset time debt upon 'reset'. 2022-06-08 16:03:16 -04:00
Thomas Harte
168dc12e27 Avoid spurious mismatches. 2022-06-08 16:03:02 -04:00
Thomas Harte
fd1955e15b Attempt to randomise and test register contents. 2022-06-08 15:12:47 -04:00
Thomas Harte
ab35016aae Clear any time debt upon phoney reset. 2022-06-08 15:12:32 -04:00
Thomas Harte
f4f93f4836 Test a single, whole instruction; record read/write. 2022-06-08 14:53:04 -04:00
Thomas Harte
6efb9b24e0 Ensure that a phoney reset gets the proper vector. 2022-06-08 14:44:15 -04:00
Thomas Harte
dd0a7533ab Randomise all parts of memory other than the opcode. 2022-06-08 14:43:51 -04:00
Thomas Harte
079c3fd263 Abort address error-causing exceptions before they begin. 2022-06-08 14:43:31 -04:00
Thomas Harte
8cbf929671 Don't duplicate work that the RESET program already does. 2022-06-08 11:42:56 -04:00
Thomas Harte
50130b7004 Minor layout tweak. 2022-06-08 11:42:42 -04:00
Thomas Harte
ab52c5cef2 Pass first all-zeroes test, establishing that processors aren't being fully reset. 2022-06-08 10:56:54 -04:00
Thomas Harte
c7fa93a5bc Attempt human-legible explanation of differences encountered. 2022-06-08 10:51:05 -04:00
Thomas Harte
400b73b5a2 Allow capture to be limited; retain timestamps. 2022-06-08 09:49:27 -04:00
Thomas Harte
788b026cf5 Log and attempt to compare some activity. Sort of. 2022-06-07 16:56:05 -04:00
Thomas Harte
9009645cea Add 'reset' functions. 2022-06-07 16:55:39 -04:00
Thomas Harte
c4ae5d4c8d Establishes at least that both 68000s can run. 2022-06-06 21:47:10 -04:00
Thomas Harte
ca8dd61045 Start sketching out an old vs new 68000 test. 2022-06-06 21:19:57 -04:00
Thomas Harte
d779bc3784
Merge pull request #1046 from TomHarte/StatusChanges 
Ensure RTE triggers a stack pointer change if needed.
 2022-06-06 16:16:52 -04:00
Thomas Harte
a4baa33e2f Ensure RTE triggers a stack pointer change if needed. 2022-06-06 16:08:50 -04:00
Thomas Harte
d4c1e92b1c
Merge pull request #1044 from TomHarte/MacintoshAudio 
Add missing `flush`.
 2022-06-05 09:20:08 -04:00
Thomas Harte
403eda7024 Add missing flush. 2022-06-05 09:08:36 -04:00
Thomas Harte
87ef0d9ab3
Merge pull request #1042 from TomHarte/68000Interrupt 
Fix interrupt acknowledge cycle: signals and data size.
 2022-06-04 21:31:03 -04:00
Thomas Harte
cfafbfd141 Fix interrupt acknowledge cycle: signals and data size. 2022-06-04 21:23:57 -04:00
Thomas Harte
7eb00c131f
Merge pull request #1036 from TomHarte/InMacintosh 
Switch the Macintosh to the newer 68000.
 2022-06-03 20:22:27 -04:00
Thomas Harte
542126194a Capture interrupt input at the end of an access cycle, not the beginning. 
All still a guess.
 2022-06-03 15:39:53 -04:00
Thomas Harte
a61f7e38b6 Very minor: avoid division and modulus when unnecessary. 2022-06-03 15:39:29 -04:00
Thomas Harte
3d059cb751 Make use of Microcycle helpers where relevant. 
None of these existed when the Macintosh was first added to this emulator.
 2022-06-03 15:33:31 -04:00
Thomas Harte
74e96b881c Merge branch 'master' into InMacintosh 2022-06-03 11:20:46 -04:00
Thomas Harte
9848fa9a4d
Merge pull request #1040 from TomHarte/68000RESET 
Fix decoding of 68000 RESET.
 2022-06-03 11:20:27 -04:00
Thomas Harte
c24a7a8b58 Merge branch '68000RESET' into InMacintosh 2022-06-03 11:17:06 -04:00
Thomas Harte
71e38a6781 Fix decoding of RESET. 2022-06-03 11:15:50 -04:00
Thomas Harte
7b3cf6e747 Add missing instruction: RESET. 2022-06-03 11:15:39 -04:00
Thomas Harte
676e4a6112 Merge branch 'master' into InMacintosh 2022-06-03 10:31:07 -04:00
Thomas Harte
fd66a9b396
Merge pull request #1033 from TomHarte/68000Mk2 
Implement a bus binding for the discrete 68000 decoder and performer.
 2022-06-03 10:30:44 -04:00
Thomas Harte
640b04e59e Test only well-defined flags. 
Albeit that timing is still off.
 2022-06-03 10:18:46 -04:00