Thomas Harte
ce6877d6e4
Sprites: infer part of DMA state from slot, no access during blank.
...
Also sets the proper vertical blank length.
2021-11-26 09:37:52 -05:00
Thomas Harte
276cbfa505
Simplify sprite state machine.
...
This now better matches the explanation given on Page 133 of the Amiga System Programmer's Guide.
2021-11-25 14:08:55 -05:00
Thomas Harte
bcc959d938
Sprites: deconflate vertical and modification flags; disarm on CTL not POS.
2021-11-19 08:03:10 -05:00
Thomas Harte
be763cf7fe
Expose joystick to the world.
2021-11-17 15:33:46 -05:00
Thomas Harte
c3b4bee210
Adds a joystick class.
2021-11-17 14:26:51 -05:00
Thomas Harte
47f36f08fb
Switches to a synchronous audio state machine; renames advance -> advance_dma.
...
I can worry about how to just-in-time things once I better understand the hardware in general.
2021-11-13 15:53:41 -05:00
Thomas Harte
fffc03c4e4
Propagates time to the audio subsystem.
2021-11-12 15:30:52 -05:00
Thomas Harte
0a94184d6b
Provides a greater wealth of audio data.
2021-11-11 09:24:15 -05:00
Thomas Harte
7be3578497
Adds a target for audio writes.
2021-11-09 07:11:23 -05:00
Thomas Harte
31e22e4cfb
Provides full serial input.
2021-11-07 05:19:16 -08:00
Thomas Harte
c0c2b5e3a9
Post key actions to the nominated serial line.
...
Albeit that I'm still thinking through whether I want the option of including a clock on Serial::Line. It'd be natural in one sense — there's already one built in — but might weaken Serial::Line's claim to be a one-stop shop for both enqueued and real-time connections without a reasonable bit of extra work.
2021-11-06 12:03:09 -07:00
Thomas Harte
c9bf2dda16
Attempt implementation of disk sync.
2021-11-02 18:18:59 -07:00
Thomas Harte
1cf1c90511
Adds support for interlaced output.
2021-11-02 14:34:03 -07:00
Thomas Harte
d989825216
Add bonus notes on VPOSR.
2021-11-02 03:47:39 -07:00
Thomas Harte
3976420b88
Retains a little more of output controls.
2021-11-01 17:15:36 -07:00
Thomas Harte
2f1ce5fe43
Switch to using the swizzled palette for playfield output.
2021-11-01 14:44:30 -07:00
Thomas Harte
42145a5b8a
Delay bitplane installation until end of slot.
2021-11-01 14:18:58 -07:00
Thomas Harte
4e66017205
Enable sprite reuse and toggle to inactive when visible region is over.
2021-10-31 16:52:48 -07:00
Thomas Harte
4c1ab6ff25
Rethinks bitplane stops.
2021-10-31 09:01:38 -07:00
Thomas Harte
edb75e69cb
Implement bitplane modulos.
2021-10-29 11:29:22 -07:00
Thomas Harte
da1a69be27
Caps mouse speed.
...
Also takes another guess at CIA interrupt bits. To no avail.
2021-10-27 18:38:02 -07:00
Thomas Harte
139d35c6f9
Switches to basic use of sprite shifters.
2021-10-25 20:58:48 -07:00
Thomas Harte
cb24457b4a
Starts on a two-at-a-time sprite shifter.
2021-10-25 16:30:30 -07:00
Thomas Harte
c6535bf035
Switches bitplane shifter to returning four high-res pixels at a time.
2021-10-25 13:34:36 -07:00
Thomas Harte
952451c9b8
Add mouse input.
2021-10-23 20:17:13 -07:00
Thomas Harte
7ec21edc2f
Attempts to hack in some form of sprite display.
2021-10-22 19:51:10 -07:00
Thomas Harte
003162f710
Limit to specific purpose.
2021-10-22 16:16:19 -07:00
Thomas Harte
040ac93042
Takes a shot at the vertical stuff of sprite DMA.
2021-10-22 14:32:59 -07:00
Thomas Harte
b489ba3d0d
Adds sprite DMA windows.
2021-10-22 13:07:20 -07:00
Thomas Harte
c5e8b547af
Captures the attach flag and observes activation rule.
2021-10-22 11:21:58 -07:00
Thomas Harte
e67de90ad0
Starts to bring sprites inside DMADevice orthodoxy.
2021-10-21 21:57:46 -07:00
Thomas Harte
c3c84c88a1
Switch to ahead-of-time planar to chunky conversion.
2021-10-21 20:48:57 -07:00
Thomas Harte
0dc9c4cee1
Undo hard-coding of fetch window.
2021-10-19 15:18:39 -07:00
Thomas Harte
253a199f27
Fire sync-match interrupt upon any match.
2021-10-14 16:36:17 -07:00
Thomas Harte
9be23ecc34
Add end-of-Blit interrupt.
...
Along with a slightly easier path for posting interrupts, in C++ compilation unit terms.
2021-10-13 15:09:19 -07:00
Thomas Harte
7733fef3bd
DSKLEN has to be written twice.
2021-10-11 06:16:01 -07:00
Thomas Harte
eb157f15f3
Adds index hole interrupt.
2021-10-09 04:08:59 -07:00
Thomas Harte
d6e2a3f425
Make a first attempt to spool into RAM.
2021-10-08 18:11:47 -07:00
Thomas Harte
b47ca13ed3
Push disk data onwards.
2021-10-08 17:18:11 -07:00
Thomas Harte
5899af0038
Starts accumulating disk data.
2021-10-07 05:11:32 -07:00
Thomas Harte
20bad38d42
Add drive activity lights.
2021-10-06 04:54:40 -07:00
Thomas Harte
2253ff656a
Adds route for inserting disks.
2021-10-05 16:12:30 -07:00
Thomas Harte
18631399ad
Attempts to clock the disk controller.
2021-10-05 15:38:56 -07:00
Thomas Harte
647ec770ce
Implements motor latching, drive ID shift registers.
2021-10-05 05:12:01 -07:00
Thomas Harte
674941abdf
Starts to add a disk controller.
2021-10-04 16:45:05 -07:00
Thomas Harte
b3f0ca39ed
Adds some unused drives.
2021-10-04 08:12:13 -07:00
Thomas Harte
5ccb512883
Moves the CIAs into the Chipset class.
...
This reflects the routing of interrupt signals for now, but also prepares for the addition of disk drives.
2021-10-04 06:44:54 -07:00
Thomas Harte
0b9ebafc0f
Flip bit deserialisation order.
2021-09-28 22:12:13 -04:00
Thomas Harte
e15f1103a0
Takes a shot at low resolution shifting.
2021-09-20 19:00:52 -04:00
Thomas Harte
a4263b5a8c
Ties bitplane collection to line position.
...
Outgoing bug: incrementing the video relative offset too often, due to cycles that are discovered to be CPU-targetted.
2021-09-19 21:55:45 -04:00
