 Thomas Harte
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48d51759cd
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At huge copy-and-paste cost, fix MOVE.l.
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2022-06-14 21:22:28 -04:00 |
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Thomas Harte
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bfd0b683bf
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Extend MOVE.b fix to cover MOVE.w.
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2022-06-14 17:04:11 -04:00 |
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Thomas Harte
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61e0f60e94
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Add specialised MOVE.b to correct bus sequencing.
This is a bit of a trial balloon; .w and .l to come.
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2022-06-13 21:49:00 -04:00 |
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Thomas Harte
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7fa715e37a
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Provide more thorough documentation.
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2022-06-13 15:27:23 -04:00 |
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Thomas Harte
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e066546c13
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Resolve PEA timing errors.
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2022-06-13 14:08:42 -04:00 |
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Thomas Harte
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7dc66128c2
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Fix strobe output.
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2022-06-13 10:49:47 -04:00 |
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Thomas Harte
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e484e4c9d7
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Expand test to make sure that correct data strobes are active.
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2022-06-13 10:39:06 -04:00 |
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Thomas Harte
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4a75691005
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Avoid double conditional for CalcEffectiveAddressIdleFor8bitDisplacementAndPreDec.
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2022-06-13 10:27:22 -04:00 |
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Thomas Harte
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8ada73b283
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Use the outer switch for addressing mode dispatch, saving a lot of syntax.
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2022-06-13 08:57:49 -04:00 |
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Thomas Harte
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f316cbcf94
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The old implementation was correct.
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2022-06-11 21:15:08 -04:00 |
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Thomas Harte
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2a9a05785c
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Bus and address error don't affect interrupt level.
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2022-06-11 21:10:24 -04:00 |
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Thomas Harte
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0a6b2b7d32
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Verify newer CMPA.l, RTE, TRAP[V] and CHK.
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2022-06-11 11:17:18 -04:00 |
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Thomas Harte
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c3345dd839
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Fix MOVEM timing.
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2022-06-10 21:52:07 -04:00 |
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Thomas Harte
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917b7fbf80
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Notarise won't fix status of CLR, NEGX, NEG, NOT.
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2022-06-10 16:50:38 -04:00 |
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Thomas Harte
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97715e7ccc
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Expand test set to include those with timing discrepancies.
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2022-06-10 16:34:05 -04:00 |
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Thomas Harte
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43c0dea1bd
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With the difference in RESET times now factored out, test timing too.
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2022-06-10 16:12:54 -04:00 |
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Thomas Harte
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2e4652209b
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Remove entire RESET sequence, move to testing PEA.
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2022-06-10 15:57:54 -04:00 |
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Thomas Harte
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aec4bf9d45
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Correct TAS timing.
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2022-06-10 15:57:35 -04:00 |
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Thomas Harte
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e2d811a7a0
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Notarise digressions that appear to be correct, remove now-working RTE/RTR.
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2022-06-09 21:48:15 -04:00 |
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Thomas Harte
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f8643a62e6
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Change RTE and RTR read order.
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2022-06-09 21:47:28 -04:00 |
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Thomas Harte
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dd5c903fd6
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DIVS also appears sometimes to differ.
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2022-06-09 20:19:39 -04:00 |
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Thomas Harte
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2e1675066d
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Reinstate address error non-testing.
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2022-06-09 16:59:06 -04:00 |
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Thomas Harte
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be84ce657b
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Add an optional testing whitelist.
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2022-06-09 16:18:04 -04:00 |
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Thomas Harte
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64053d697f
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Take improved guess at address error stacking order.
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2022-06-09 16:17:09 -04:00 |
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Thomas Harte
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a59ad06438
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Print out summary of failure.
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2022-06-09 13:13:33 -04:00 |
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Thomas Harte
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5af03d74ec
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Add note to self about first diagnosis.
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2022-06-09 12:21:39 -04:00 |
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Thomas Harte
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ba2803c807
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Include all bus activity after the split.
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2022-06-09 11:30:22 -04:00 |
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Thomas Harte
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fdcbf617d8
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Avoid STOP.
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2022-06-09 08:42:31 -04:00 |
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Thomas Harte
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cc7a4f7f91
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Fix test build.
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2022-06-08 21:15:11 -04:00 |
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Thomas Harte
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2e42bda0a3
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Permit instructions that end in an address error to differ in transactions.
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2022-06-08 16:15:33 -04:00 |
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Thomas Harte
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da8e6737c6
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Fix standard exception stack write order.
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2022-06-08 16:15:11 -04:00 |
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Thomas Harte
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670201fcc2
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Reset time debt upon 'reset'.
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2022-06-08 16:03:16 -04:00 |
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Thomas Harte
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168dc12e27
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Avoid spurious mismatches.
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2022-06-08 16:03:02 -04:00 |
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Thomas Harte
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fd1955e15b
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Attempt to randomise and test register contents.
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2022-06-08 15:12:47 -04:00 |
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Thomas Harte
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ab35016aae
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Clear any time debt upon phoney reset.
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2022-06-08 15:12:32 -04:00 |
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Thomas Harte
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f4f93f4836
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Test a single, whole instruction; record read/write.
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2022-06-08 14:53:04 -04:00 |
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Thomas Harte
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6efb9b24e0
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Ensure that a phoney reset gets the proper vector.
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2022-06-08 14:44:15 -04:00 |
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Thomas Harte
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dd0a7533ab
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Randomise all parts of memory other than the opcode.
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2022-06-08 14:43:51 -04:00 |
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Thomas Harte
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079c3fd263
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Abort address error-causing exceptions before they begin.
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2022-06-08 14:43:31 -04:00 |
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Thomas Harte
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8cbf929671
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Don't duplicate work that the RESET program already does.
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2022-06-08 11:42:56 -04:00 |
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Thomas Harte
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50130b7004
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Minor layout tweak.
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2022-06-08 11:42:42 -04:00 |
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Thomas Harte
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ab52c5cef2
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Pass first all-zeroes test, establishing that processors aren't being fully reset.
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2022-06-08 10:56:54 -04:00 |
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Thomas Harte
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c7fa93a5bc
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Attempt human-legible explanation of differences encountered.
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2022-06-08 10:51:05 -04:00 |
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Thomas Harte
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400b73b5a2
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Allow capture to be limited; retain timestamps.
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2022-06-08 09:49:27 -04:00 |
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Thomas Harte
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788b026cf5
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Log and attempt to compare some activity. Sort of.
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2022-06-07 16:56:05 -04:00 |
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Thomas Harte
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9009645cea
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Add 'reset' functions.
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2022-06-07 16:55:39 -04:00 |
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Thomas Harte
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c4ae5d4c8d
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Establishes at least that both 68000s can run.
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2022-06-06 21:47:10 -04:00 |
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Thomas Harte
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ca8dd61045
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Start sketching out an old vs new 68000 test.
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2022-06-06 21:19:57 -04:00 |
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 Thomas Harte
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d779bc3784
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Merge pull request #1046 from TomHarte/StatusChanges
Ensure RTE triggers a stack pointer change if needed.
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2022-06-06 16:16:52 -04:00 |
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Thomas Harte
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a4baa33e2f
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Ensure RTE triggers a stack pointer change if needed.
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2022-06-06 16:08:50 -04:00 |
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