Thomas Harte
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58b04cdfa4
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Switch to an alternative form of avoiding unused goto warnings.
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2022-06-29 19:08:41 -04:00 |
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Thomas Harte
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c2938a4f63
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Avoid potential classic macro error with address .
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2022-06-29 15:09:52 -04:00 |
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Thomas Harte
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e0ec3c986d
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Ensure appropriate data bus size.
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2022-06-25 21:07:29 -04:00 |
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Thomas Harte
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fc1952bf42
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Add an automatic bus size selector.
This fixes the Jeek test.
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2022-06-25 16:28:06 -04:00 |
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Thomas Harte
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4467eb1c41
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Ensure relevant throwaway stack reads use the previous stack address.
TODO: can CycleFetchPreviousThrowaway be used more widely?
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2022-06-24 14:00:03 -04:00 |
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Thomas Harte
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1c1ce625a7
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Vector reads signal VDA.
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2022-06-24 10:37:39 -04:00 |
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Thomas Harte
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069a057a94
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Resolve assumption of arithmetic shifts.
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2022-06-24 07:26:07 -04:00 |
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Thomas Harte
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4ed3b21bf3
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Decimal SBC tweak: negative partial results don't cause carry.
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2022-06-23 21:58:09 -04:00 |
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Thomas Harte
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a23b0f5122
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Map STA (d), y to correct calculator.
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2022-06-23 20:57:47 -04:00 |
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Thomas Harte
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da552abf75
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Fix BIT overflow flag.
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2022-06-23 15:24:51 -04:00 |
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Thomas Harte
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380b5141fb
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Be overt about conversion wanted here.
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2022-06-23 13:03:26 -04:00 |
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Thomas Harte
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66775b2c4e
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Always consume a second cycle in 16-bit mode.
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2022-06-23 12:46:51 -04:00 |
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Thomas Harte
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2c12a7d968
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Make absolutely sure there's no address bit 24.
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2022-06-23 12:12:02 -04:00 |
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Thomas Harte
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5a97c09238
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Flip internal presumption on the BRK flag.
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2022-06-23 11:23:00 -04:00 |
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Thomas Harte
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3112376943
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Don't include DBR in direct indexed indirect.
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2022-06-23 11:03:37 -04:00 |
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Thomas Harte
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ecfd17a259
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Report a 1 in the stack pointer high byte when in emulation mode.
It has one internally, it just wasn't previously exposed via this method.
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2022-06-22 15:55:34 -04:00 |
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Thomas Harte
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a72dd96dc6
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Page boundary crossing is free outside of emulation mode.
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2022-06-22 15:31:30 -04:00 |
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Thomas Harte
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944e5ebbfa
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Take another run at IO addresses.
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2022-06-22 15:28:11 -04:00 |
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Thomas Harte
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76767110b7
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Fix overflow for 8-bit calculations; essentially a revert for ADC.
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2022-06-22 15:18:47 -04:00 |
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Thomas Harte
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7dcfa9eb65
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65816: improve decimal calculations, posted IO addresses, read/write during redundant read-modify-write cycle.
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2022-06-21 14:33:06 -04:00 |
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Thomas Harte
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ec98736bd7
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Ensure IO cycles don't produce an address of (PC+1).
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2022-06-21 11:41:05 -04:00 |
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Thomas Harte
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586ef4810b
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Add restart_operation_fetch , to aid with testing.
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2022-06-18 16:25:57 -04:00 |
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Thomas Harte
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a0bc332fe6
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Taking a second parse, prefer non-lookup-table solutions.
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2022-06-17 11:55:38 -04:00 |
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Thomas Harte
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b0ab5b7b62
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Simplify Microcycle helpers.
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2022-06-16 21:34:24 -04:00 |
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Thomas Harte
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dc8103ea82
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Fix return address following a STOP.
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2022-06-16 15:10:35 -04:00 |
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Thomas Harte
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7d00b50e13
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Fix upper/lower_data_select; simplify value8_low.
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2022-06-15 21:11:31 -04:00 |
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Thomas Harte
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12b058867e
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Correct very minor typo.
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2022-06-15 19:34:54 -04:00 |
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Thomas Harte
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8ff09a1923
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Fix value8_high .
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2022-06-15 19:34:49 -04:00 |
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Thomas Harte
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62fa0991ed
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Disallow copying, add some basic asserts.
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2022-06-15 19:34:43 -04:00 |
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Thomas Harte
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24823233ff
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Add spurious interrupt support.
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2022-06-15 11:00:27 -04:00 |
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Thomas Harte
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bd056973ba
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Don't allow STOP state to block execution.
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2022-06-15 10:56:45 -04:00 |
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Thomas Harte
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5420fd5aa3
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Fix: new status word is still in prefetch.
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2022-06-15 10:54:34 -04:00 |
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Thomas Harte
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93615f6647
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Apply new status before entering STOP loop.
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2022-06-15 10:50:03 -04:00 |
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Thomas Harte
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0ace9634ce
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Fix MOVEA.
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2022-06-14 21:56:48 -04:00 |
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Thomas Harte
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48d51759cd
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At huge copy-and-paste cost, fix MOVE.l.
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2022-06-14 21:22:28 -04:00 |
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Thomas Harte
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bfd0b683bf
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Extend MOVE.b fix to cover MOVE.w.
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2022-06-14 17:04:11 -04:00 |
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Thomas Harte
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61e0f60e94
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Add specialised MOVE.b to correct bus sequencing.
This is a bit of a trial balloon; .w and .l to come.
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2022-06-13 21:49:00 -04:00 |
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Thomas Harte
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7fa715e37a
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Provide more thorough documentation.
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2022-06-13 15:27:23 -04:00 |
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Thomas Harte
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e066546c13
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Resolve PEA timing errors.
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2022-06-13 14:08:42 -04:00 |
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Thomas Harte
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4a75691005
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Avoid double conditional for CalcEffectiveAddressIdleFor8bitDisplacementAndPreDec.
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2022-06-13 10:27:22 -04:00 |
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Thomas Harte
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8ada73b283
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Use the outer switch for addressing mode dispatch, saving a lot of syntax.
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2022-06-13 08:57:49 -04:00 |
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Thomas Harte
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2a9a05785c
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Bus and address error don't affect interrupt level.
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2022-06-11 21:10:24 -04:00 |
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Thomas Harte
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c3345dd839
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Fix MOVEM timing.
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2022-06-10 21:52:07 -04:00 |
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Thomas Harte
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aec4bf9d45
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Correct TAS timing.
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2022-06-10 15:57:35 -04:00 |
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Thomas Harte
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f8643a62e6
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Change RTE and RTR read order.
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2022-06-09 21:47:28 -04:00 |
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Thomas Harte
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64053d697f
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Take improved guess at address error stacking order.
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2022-06-09 16:17:09 -04:00 |
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Thomas Harte
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da8e6737c6
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Fix standard exception stack write order.
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2022-06-08 16:15:11 -04:00 |
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Thomas Harte
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670201fcc2
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Reset time debt upon 'reset'.
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2022-06-08 16:03:16 -04:00 |
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Thomas Harte
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ab35016aae
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Clear any time debt upon phoney reset.
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2022-06-08 15:12:32 -04:00 |
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Thomas Harte
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6efb9b24e0
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Ensure that a phoney reset gets the proper vector.
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2022-06-08 14:44:15 -04:00 |
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