Thomas Harte
c6dd7d4726
Transcribe no-sprite event list.
2023-01-22 20:19:21 -05:00
Thomas Harte
b7d80f5ed1
Copy in some notes, expand line buffer.
2023-01-21 23:04:48 -05:00
Thomas Harte
a5765abbad
Route into the Yamaha fetcher.
...
Albeit that it doesn't yet fetch.
2023-01-21 22:47:16 -05:00
Thomas Harte
696ec12516
Add address rotation for applicable modes.
2023-01-21 22:33:26 -05:00
Thomas Harte
c9734df65c
Implement extended colour, sprite and RAM pointers.
2023-01-21 20:45:23 -05:00
Thomas Harte
13e490e7d7
Log selected screen mode.
2023-01-21 14:48:55 -05:00
Thomas Harte
cefcc1d443
Expand Yamaha graphics mode recognition.
2023-01-21 14:35:26 -05:00
Thomas Harte
d1f929e6f7
Just do a multiply and divide. Easy.
2023-01-21 14:19:52 -05:00
Thomas Harte
e289e6e757
Catch and map Yamaha palette entries.
...
It's one less thing in the uncaptured log.
2023-01-21 14:12:46 -05:00
Thomas Harte
a726c9d97a
Enable indirect register writes.
2023-01-20 23:14:57 -05:00
Thomas Harte
c77e7c268f
1 = disable, 0 = enable.
2023-01-20 23:08:41 -05:00
Thomas Harte
9c57bfd58d
Attempt to log dropped indirect writes.
2023-01-20 23:07:14 -05:00
Thomas Harte
4efda108c6
Transcribe the Yamaha 9938 register meanings.
2023-01-20 23:00:33 -05:00
Thomas Harte
191cf4829b
Attempt real blank reporting.
2023-01-20 22:29:49 -05:00
Thomas Harte
9b7a925816
Give clearer names to the two pointers.
2023-01-20 20:29:15 -05:00
Thomas Harte
392b0acb58
Pull everything out of master_system_ struct.
...
Now that it's inherently collected in the relevant `Storage`.
2023-01-19 15:09:16 -05:00
Thomas Harte
4b7606894e
Move Master System state, and start simplifying.
2023-01-19 14:09:31 -05:00
Thomas Harte
1fb94d15ab
No need for this-> ugliness in Base methods.
2023-01-19 12:32:42 -05:00
Thomas Harte
348c42bdea
Start trying to bluff my way through extended status.
2023-01-18 22:23:19 -05:00
Thomas Harte
e450e53c4e
Temporarily copy and paste my way to further logging.
2023-01-18 14:59:30 -05:00
Thomas Harte
355ee7fbc7
Adjust factoring of read and write per expanded V9938 scope.
2023-01-18 12:36:57 -05:00
Thomas Harte
4d96122884
Eliminate hard-coded assumption of 16kb.
...
Clearly I'll have to do something else to support 128k+, probably move the ram pointer?
2023-01-10 12:38:19 -05:00
Thomas Harte
f1f16d1f9a
Clarify and simplify half_cycles_before_internal_cycles.
2023-01-09 22:55:46 -05:00
Thomas Harte
fd14829992
Avoid hand-writing all the various conversions.
2023-01-09 22:34:56 -05:00
Thomas Harte
c0fe88a5bb
Apply clock conversion to existing usages of do_external_slot.
2023-01-09 13:54:49 -05:00
Thomas Harte
4d9d684618
Add TODO on dangling hard-coded conversion.
2023-01-08 21:44:25 -05:00
Thomas Harte
a0a835cf10
Export memory size into traits.
2023-01-08 21:37:20 -05:00
Thomas Harte
ef67205ce8
Set pixel count per mode.
2023-01-08 21:31:00 -05:00
Thomas Harte
794adf470b
Break assumption that cycles = pixels; fix pixel clocking.
2023-01-08 21:25:22 -05:00
Thomas Harte
8cc20844a9
Clock convert for draw_ calls.
2023-01-08 17:31:08 -05:00
Thomas Harte
b522d65c50
Fix border lengths.
2023-01-08 17:04:19 -05:00
Thomas Harte
cb19c2ffb0
Honour internal-clocked timing constants.
2023-01-08 14:10:06 -05:00
Thomas Harte
5f6ddf8557
Avoid expressing the same thing at different clock rates.
2023-01-08 13:58:12 -05:00
Thomas Harte
72e0bfecc1
Edge towards clock-independent line composition.
2023-01-07 14:57:32 -05:00
Thomas Harte
cdf547ac82
Decline to provide synthetic text mode timing on the Mega Drive.
2023-01-07 14:37:06 -05:00
Thomas Harte
dd5b4b484a
Avoid double responsibility for state.
2023-01-07 14:34:33 -05:00
Thomas Harte
56831e02fc
Expand fixed timing constants.
2023-01-07 13:10:51 -05:00
Thomas Harte
5d2d3944ef
Make VRAM access delay a timing property.
2023-01-07 12:48:43 -05:00
Thomas Harte
f9e21df701
Avoid further hard-coded 342s.
2023-01-07 09:13:34 -05:00
Thomas Harte
bb436204f6
Merge branch 'VDPs' of github.com:TomHarte/CLK into VDPs
2023-01-07 09:10:50 -05:00
Thomas Harte
de45536b5c
Elucidate a magic constant, add an extra constexpr.
2023-01-07 09:10:41 -05:00
Thomas Harte
ebc1264c2c
Create a common home for timing information.
2023-01-06 22:39:46 -05:00
Thomas Harte
7a82b76911
Ensure visibility of memset.
2023-01-05 13:21:03 -05:00
Thomas Harte
27d37f71ec
Generalise and better factor bit reversal and TMS drawing.
2023-01-05 13:18:10 -05:00
Thomas Harte
c4a5a9763e
Minor indentation improvement.
2023-01-02 15:04:50 -05:00
Thomas Harte
a9f97ac871
Fix nothing-to-do test.
2023-01-02 15:04:08 -05:00
Thomas Harte
475440dc70
Update ClockConverter for potential alternative clocks.
2023-01-02 14:59:36 -05:00
Thomas Harte
dc3f8f5e42
These are the three fetchers to implement.
...
They'll look fairly different from the TMS and SMS fetchers, I think, owing to the greater irregularity that comes with the smarter RAM accesses. I might need to play around for a while.
2023-01-01 22:44:06 -05:00
Thomas Harte
459ef39b08
constexpr the TMS palette.
2023-01-01 22:34:07 -05:00
Thomas Harte
27812fd0e2
Separate fetchers into their own header.
2023-01-01 22:26:50 -05:00
Thomas Harte
38eb4d36de
Better explain cumulative nature of @c to_internal.
2023-01-01 22:18:39 -05:00
Thomas Harte
2bd20a0cf8
Add further exposition.
2023-01-01 22:17:21 -05:00
Thomas Harte
da61909ec5
Explain the purpose here.
2023-01-01 21:20:30 -05:00
Thomas Harte
5729ece7bb
Incompletely transitions towards more flexible clock ratios.
2023-01-01 14:20:45 -05:00
Thomas Harte
151f60958e
Relocate the 9918 implementation file.
2023-01-01 14:01:19 -05:00
Thomas Harte
180045ada6
Convert vram_access_delay into a free-standing function.
2023-01-01 13:51:52 -05:00
Thomas Harte
11542e7a7f
Improve const correctness, simplify inheritance.
2023-01-01 13:49:11 -05:00
Thomas Harte
ffb0b2ce0b
Eliminate runtime duplication of personality.
2022-12-31 21:50:57 -05:00
Thomas Harte
b7c315058f
Also template Base.
2022-12-31 21:47:05 -05:00
Thomas Harte
d79aac3081
Shuffle the personality enum into the 'public' header.
2022-12-31 15:01:11 -05:00
Thomas Harte
711f7b2d75
C++17 makes this a single step.
2022-12-27 22:50:12 -05:00
Thomas Harte
dca8c51384
Prefer to avoid a macro.
2022-12-27 22:36:27 -05:00
Thomas Harte
2ab4b351ca
Extend enum.
2022-12-27 22:20:47 -05:00
Thomas Harte
650b9a139b
Tweak Master System blue scale.
2021-03-19 08:38:21 -04:00
Thomas Harte
3cb1072c29
Adds an explicit [[fallthrough]] tag.
2020-06-19 23:10:25 -04:00
Thomas Harte
267006782f
Starts to add Qt target; resolves many build warnings.
2020-05-30 00:37:06 -04:00
Thomas Harte
66c2eb0414
Further tightens const and constexpr usage.
2020-05-12 22:22:21 -04:00
Thomas Harte
25996ce180
Further doubles down on construction syntax for type conversions.
2020-05-09 23:00:39 -04:00
Thomas Harte
929475d31e
Minor correction: round down, not up.
2019-09-28 23:49:32 -04:00
Thomas Harte
ee89be6730
Removes many stray spaces.
2018-11-23 22:32:32 -05:00
Thomas Harte
9dff13cbbf
Re-establishes output from the machines with 9918s and derivatives.
2018-11-14 22:25:19 -05:00
Thomas Harte
f65d80b7d1
Ensures offset and flags are initialised to 0.
...
This prevents a potential crash at startup.
2018-10-29 22:09:32 -04:00
Thomas Harte
e02aa885d8
Testing against the ColecoVision suggests this is probably always 7.
2018-10-26 20:59:12 -04:00
Thomas Harte
bb09762029
Introduces extra delays to VRAM access.
2018-10-26 20:19:08 -04:00
Thomas Harte
05a5c7120e
Shunts CRAM dots into their proper place.
2018-10-26 20:06:51 -04:00
Thomas Harte
521d603902
Adds a first attempt at CRAM dot output. With a TODO.
2018-10-26 19:26:46 -04:00
Thomas Harte
916710353a
Makes it explicit that I want the reference.
2018-10-25 23:18:34 -04:00
Thomas Harte
53b00dea3f
Adds missing include.
2018-10-25 23:12:41 -04:00
Thomas Harte
0587b9f257
Edges to within millimetres of CRAM dots.
...
... but all the way up to bedtime.
2018-10-25 23:12:03 -04:00
Thomas Harte
2cdeaa2575
Moves misplaced bracket.
2018-10-23 22:37:19 -04:00
Thomas Harte
286783e880
Accepts GCC's suggestion of extra clarity brackets.
2018-10-23 22:36:23 -04:00
Thomas Harte
00e7958a97
Separates request for an SMS2 VDP from current graphics mode.
...
Thereby fixes various minor segments of Codemasters games.
2018-10-23 22:19:45 -04:00
Thomas Harte
2f995eb622
Adjusts vertical timing for display height.
2018-10-23 21:20:44 -04:00
Thomas Harte
90fbad0f1c
Implements SMS2-style addressing if in a 224 or 240-line mode.
...
This isn't quite accurate, but it'll do for development.
2018-10-23 20:30:08 -04:00
Thomas Harte
2cbd28478d
Allows the sprite terminator to be specified.
2018-10-23 20:01:47 -04:00
Thomas Harte
883680731a
Uses explicit state to determine whether a pixel target has been requested.
2018-10-21 21:18:41 -04:00
Thomas Harte
0822c96ce0
Implements the proper row counter values for > 192 row modes.
2018-10-19 22:37:56 -04:00
Thomas Harte
4cd65eab5c
Seeks to avoid bad macro expansion.
2018-10-18 22:36:25 -04:00
Thomas Harte
da00c832f5
Corrects colour fetching for multicolour text mode.
2018-10-18 20:38:00 -04:00
Thomas Harte
8ff265c3a1
Corrects multicolour text mode.
2018-10-18 20:25:42 -04:00
Thomas Harte
1fc88c4eff
Corrects off-by-one error in line fetching coroutines.
2018-10-16 21:36:31 -04:00
Thomas Harte
5dfe7d8596
Corrects most of TMS sprite drawing.
2018-10-16 20:49:04 -04:00
Thomas Harte
231009b901
Makes faulty attempt to reintroduce TMS-mode sprites.
2018-10-16 20:00:06 -04:00
Thomas Harte
1c5f939aea
Reintroduces tiles and some element of sprites in regular TMS mode.
2018-10-14 21:52:13 -04:00
Thomas Harte
c1e6406fc9
Corrects sprite accumulation.
2018-10-14 19:56:09 -04:00
Thomas Harte
d66979c68f
Switched to a very large number of buffers, and resolved stupid attempt to reassign a reference.
2018-10-14 18:19:11 -04:00
Thomas Harte
6c09abc6cb
Makes a flawed attempt to reformulate this exactly as two separate processes on a common clock with an interchange buffer.
...
Specifically because closer inspection of the TMS modes shows it isn't quite valid to model output of one line as having fully completed prior to fetching of the next. So some sort of extra buffer is required. At which point it is most natural to continue with the logic that each fetch routine is oriented around the fetching process for a single line, and each output routine has the same view, suggesting separate read/write addresses.
Something is wrong though, as video data is being output too rapidly (I think) and with occasional sync issues (again: subject to investigation).
2018-10-14 16:23:45 -04:00
Thomas Harte
9e52ead09a
Ensures sprite scanning doesn't improperly set collision flag; that slot 151 is filled.
2018-10-12 19:50:48 -04:00
Thomas Harte
f6af6778ab
Moves scrolling latch to proper position and implements 4-window fetching offset.
2018-10-11 22:36:27 -04:00
Thomas Harte
52e02db5c8
Introduces horizontal counter latching and reading.
...
Then makes a new guess at frame IRQ position. But gets it wrong. Hmmm.
2018-10-11 19:56:32 -04:00
