Thomas Harte
|
ae6cf69449
|
Move responsibility for clock division; reinstate vsync interrupt.
|
2024-03-22 10:01:34 -04:00 |
|
Thomas Harte
|
4a2dcff028
|
Endeavour to map colours properly.
|
2024-03-21 21:53:50 -04:00 |
|
Thomas Harte
|
aa6acec8fa
|
Don't hoard cycles per line value.
|
2024-03-21 21:47:27 -04:00 |
|
Thomas Harte
|
4ac4da908c
|
Reduce TODOs, do _something_ with border colour.
|
2024-03-21 21:40:11 -04:00 |
|
Thomas Harte
|
66e62857c4
|
Give ostensibly clean timing to the CRT.
|
2024-03-21 21:29:53 -04:00 |
|
Thomas Harte
|
bbc0d8b050
|
Count time in phase correctly.
|
2024-03-21 21:15:25 -04:00 |
|
Thomas Harte
|
0f8bc416d1
|
Make first, faulty step into displaying a field.
|
2024-03-21 21:10:55 -04:00 |
|
Thomas Harte
|
2ec235170e
|
Finish the thought on magic constants.
|
2024-03-21 20:45:17 -04:00 |
|
Thomas Harte
|
2de1a2dd0d
|
Install and properly clock a CRT.
|
2024-03-21 20:41:24 -04:00 |
|
Thomas Harte
|
1f49c3b113
|
Give sound and video somewhere to read from.
|
2024-03-21 20:22:20 -04:00 |
|
Thomas Harte
|
5c645fb3c2
|
Switch to a fixed output clock; retain addresses.
|
2024-03-21 11:51:29 -04:00 |
|
Thomas Harte
|
40b5227f0b
|
Deliver all addresses to the video outputter.
|
2024-03-21 11:24:47 -04:00 |
|
Thomas Harte
|
847dba8f07
|
Divide input pixel rate.
|
2024-03-21 11:03:28 -04:00 |
|
Thomas Harte
|
417c6c4629
|
Announce changes.
|
2024-03-21 10:51:52 -04:00 |
|
Thomas Harte
|
2d6a4d490e
|
Add dummy retrace interrupt.
|
2024-03-21 10:02:56 -04:00 |
|
Thomas Harte
|
a6ec870872
|
Capture more audio detail.
|
2024-03-21 09:47:53 -04:00 |
|
Thomas Harte
|
389541be6d
|
Pipe further sound parameters; obey divider.
|
2024-03-20 14:43:47 -04:00 |
|
Thomas Harte
|
208f3e24de
|
Audio ticks are now included.
|
2024-03-20 14:30:21 -04:00 |
|
Thomas Harte
|
1341816791
|
Break apart, switching to delegates for interrupts.
|
2024-03-20 14:26:56 -04:00 |
|
Thomas Harte
|
08673ff021
|
Switch to macro blocks of execution; flail around audio.
|
2024-03-20 11:42:37 -04:00 |
|
Thomas Harte
|
3a2d9c6082
|
Give user access to ROM; clean up a touch.
|
2024-03-19 20:26:17 -04:00 |
|
Thomas Harte
|
43a3959b8f
|
Don't data abort on missing low ROM.
|
2024-03-19 15:06:01 -04:00 |
|
Thomas Harte
|
85a738acff
|
Get rigorous on exception addresses.
|
2024-03-19 15:03:31 -04:00 |
|
Thomas Harte
|
2ad6bb099b
|
Begin foray into disassembly.
|
2024-03-19 11:34:10 -04:00 |
|
Thomas Harte
|
9d858bc61b
|
IRQ and FIQ should also store PC+4.
|
2024-03-18 14:08:08 -04:00 |
|
Thomas Harte
|
612c9ce49a
|
Transfer logging responsibility.
|
2024-03-18 11:09:29 -04:00 |
|
Thomas Harte
|
7b1f800387
|
Extend I2C state machine.
|
2024-03-17 21:55:19 -04:00 |
|
Thomas Harte
|
47e9279bd4
|
Add a target for I2C activity.
|
2024-03-16 15:00:23 -04:00 |
|
Thomas Harte
|
635efd0212
|
Clear keyboard interrupts.
|
2024-03-15 23:19:26 -04:00 |
|
Thomas Harte
|
1c1d2891c7
|
Adjust IRQ/FIQ return addresses.
|
2024-03-15 21:59:38 -04:00 |
|
Thomas Harte
|
1979d2e5ba
|
Don't set interrupt flags before capture.
|
2024-03-15 21:34:39 -04:00 |
|
Thomas Harte
|
3a899ea4be
|
Add test coverage for STM descending, proving nothing.
|
2024-03-15 14:55:17 -04:00 |
|
Thomas Harte
|
9d08282e28
|
Add enough of a keyboard to respond to reset.
|
2024-03-15 10:57:18 -04:00 |
|
Thomas Harte
|
18154278d1
|
Add minor note on where next.
|
2024-03-14 21:54:20 -04:00 |
|
Thomas Harte
|
bc27e3998d
|
Fix downward block data transfers.
|
2024-03-14 21:09:51 -04:00 |
|
Thomas Harte
|
19fa0b8945
|
Shush logging, momentarily.
|
2024-03-14 10:53:38 -04:00 |
|
Thomas Harte
|
4987bdfec9
|
Throw less.
|
2024-03-14 10:43:51 -04:00 |
|
Thomas Harte
|
0e4615564d
|
Make bit masks easily testable; expand logging.
|
2024-03-13 14:31:26 -04:00 |
|
Thomas Harte
|
7aeea535a1
|
Reduce branchiness.
|
2024-03-13 11:02:52 -04:00 |
|
Thomas Harte
|
2ed031e440
|
Prepare for additional devices.
|
2024-03-12 21:23:22 -04:00 |
|
Thomas Harte
|
c6b91559e1
|
Attempt to wire up timer interrupts.
|
2024-03-12 11:34:31 -04:00 |
|
Thomas Harte
|
6efc41ded7
|
Come to conclusion on R15; fix link values.
|
2024-03-12 10:42:09 -04:00 |
|
Thomas Harte
|
8b3c0abe93
|
Take another swing at R15 as a destination.
|
2024-03-12 09:13:05 -04:00 |
|
Thomas Harte
|
a5ebac1b29
|
Add RISC OS 3.11 to catalogue, while bug hunting.
|
2024-03-11 22:19:14 -04:00 |
|
Thomas Harte
|
1ccfae885c
|
Remove extra slashes.
|
2024-03-11 15:06:17 -04:00 |
|
Thomas Harte
|
e7457461ba
|
Reduce magic constants.
|
2024-03-11 14:49:03 -04:00 |
|
Thomas Harte
|
a28c97c0de
|
Simplify privilege test.
|
2024-03-11 12:14:00 -04:00 |
|
Thomas Harte
|
21278d028c
|
Correct unaligned accesses.
|
2024-03-10 21:56:19 -04:00 |
|
Thomas Harte
|
fbc273f114
|
Add invented model for tests.
|
2024-03-10 21:45:56 -04:00 |
|
Thomas Harte
|
47f7340dfc
|
Start hacking in some ARM tests.
|
2024-03-08 22:54:42 -05:00 |
|
Thomas Harte
|
fdef8901ab
|
Double down on uint32_t.
|
2024-03-08 14:13:34 -05:00 |
|
Thomas Harte
|
a46ec4cffb
|
Up clock rate to 24Mhz.
|
2024-03-07 22:16:58 -05:00 |
|
Thomas Harte
|
9bb5dc3c2b
|
Fix inclusive range.
|
2024-03-07 19:40:34 -05:00 |
|
Thomas Harte
|
f6ea442606
|
Include various debugging detritus.
|
2024-03-07 14:28:39 -05:00 |
|
Thomas Harte
|
15ee84b2eb
|
Fix MUL ambiguity.
|
2024-03-07 11:45:39 -05:00 |
|
Thomas Harte
|
d380cecdb7
|
Add timers that count.
|
2024-03-07 11:39:26 -05:00 |
|
Thomas Harte
|
ae3cd924e8
|
Add a 2Mhz tick for timers.
|
2024-03-07 11:12:40 -05:00 |
|
Thomas Harte
|
a0f0f73bde
|
Fix MOV as unconditional branch.
|
2024-03-07 10:31:26 -05:00 |
|
Thomas Harte
|
7cdceb7b4f
|
Add a specific shout-out on prefetch abort, for debugging.
|
2024-03-07 10:23:46 -05:00 |
|
Thomas Harte
|
38b5624639
|
Add a little more VIDC detail.
|
2024-03-07 10:05:22 -05:00 |
|
Thomas Harte
|
3405b3b287
|
Add power-on bit, moving problems forward.
|
2024-03-06 22:14:56 -05:00 |
|
Thomas Harte
|
173fc9329a
|
Add a little protection logic.
|
2024-03-06 22:00:34 -05:00 |
|
Thomas Harte
|
691a42d81e
|
Attempt some logical mapping.
|
2024-03-06 21:51:19 -05:00 |
|
Thomas Harte
|
4059905f85
|
Slightly reorder messaging.
|
2024-03-06 16:45:17 -05:00 |
|
Thomas Harte
|
bbb520fd12
|
Transcribe some notes.
|
2024-03-06 15:31:07 -05:00 |
|
Thomas Harte
|
108a056f1c
|
Execution now runs into a prefetch abort loop.
|
2024-03-06 15:05:24 -05:00 |
|
Thomas Harte
|
ed92e98ca2
|
Start looking at address translation.
|
2024-03-06 14:56:06 -05:00 |
|
Thomas Harte
|
0d666f9935
|
Get a bit more rigorous about reporting.
|
2024-03-06 09:54:39 -05:00 |
|
Thomas Harte
|
387791635e
|
Start to establish a memory map.
|
2024-03-04 21:43:06 -05:00 |
|
Thomas Harte
|
b7a1363add
|
Add an incorrect execution loop.
|
2024-03-04 21:09:24 -05:00 |
|
Thomas Harte
|
1f43047de8
|
Loop the ARM executor into the build.
|
2024-03-04 12:08:46 -05:00 |
|
Thomas Harte
|
6f0ad0ab71
|
Add an empty Archimedes shell.
|
2024-03-04 12:06:43 -05:00 |
|
Thomas Harte
|
3e80651a0e
|
Collect 'Electron' under 'Acorn'.
|
2024-03-04 11:31:25 -05:00 |
|