Thomas Harte
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c6535bf035
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Switches bitplane shifter to returning four high-res pixels at a time.
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2021-10-25 13:34:36 -07:00 |
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Thomas Harte
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7118a515e0
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Reduce logging in trustworthy areas.
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2021-10-23 20:36:41 -07:00 |
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Thomas Harte
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952451c9b8
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Add mouse input.
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2021-10-23 20:17:13 -07:00 |
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Thomas Harte
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610327a04e
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Fix sprite H start bit order.
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2021-10-22 23:20:20 -07:00 |
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Thomas Harte
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2121e32409
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Fix sprite bit ordering.
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2021-10-22 21:10:01 -07:00 |
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Thomas Harte
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7ec21edc2f
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Attempts to hack in some form of sprite display.
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2021-10-22 19:51:10 -07:00 |
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Thomas Harte
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003162f710
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Limit to specific purpose.
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2021-10-22 16:16:19 -07:00 |
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Thomas Harte
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040ac93042
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Takes a shot at the vertical stuff of sprite DMA.
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2021-10-22 14:32:59 -07:00 |
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Thomas Harte
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b489ba3d0d
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Adds sprite DMA windows.
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2021-10-22 13:07:20 -07:00 |
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Thomas Harte
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c5e8b547af
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Captures the attach flag and observes activation rule.
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2021-10-22 11:21:58 -07:00 |
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Thomas Harte
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e67de90ad0
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Starts to bring sprites inside DMADevice orthodoxy.
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2021-10-21 21:57:46 -07:00 |
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Thomas Harte
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c3c84c88a1
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Switch to ahead-of-time planar to chunky conversion.
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2021-10-21 20:48:57 -07:00 |
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Thomas Harte
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0dc9c4cee1
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Undo hard-coding of fetch window.
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2021-10-19 15:18:39 -07:00 |
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Thomas Harte
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b312a61a81
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Add two dummy reads.
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2021-10-16 13:30:45 -07:00 |
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Thomas Harte
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4917556a99
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The shift goes the other way in descending mode.
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2021-10-16 11:09:40 -07:00 |
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Thomas Harte
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aa6b0f07b7
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Correct filename.
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2021-10-16 05:37:46 -07:00 |
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Thomas Harte
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e27a10bde4
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Simplify control flow.
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2021-10-14 16:47:18 -07:00 |
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Thomas Harte
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253a199f27
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Fire sync-match interrupt upon any match.
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2021-10-14 16:36:17 -07:00 |
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Thomas Harte
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61e5702520
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Remove dead TODO.
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2021-10-14 16:09:11 -07:00 |
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Thomas Harte
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b12c640807
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Makes drives non-copyable.
To avoid error in the future.
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2021-10-14 12:37:55 -07:00 |
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Thomas Harte
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9be23ecc34
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Add end-of-Blit interrupt.
Along with a slightly easier path for posting interrupts, in C++ compilation unit terms.
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2021-10-13 15:09:19 -07:00 |
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Thomas Harte
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eec068914e
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Slightly improve logging.
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2021-10-11 18:05:57 -07:00 |
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Thomas Harte
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39b8285ba5
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Trust the HRM on step bit, but catch rising edge.
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2021-10-11 07:42:42 -07:00 |
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Thomas Harte
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7733fef3bd
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DSKLEN has to be written twice.
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2021-10-11 06:16:01 -07:00 |
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Thomas Harte
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6acddfdb98
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Add the sync match interrupt.
Albeit that it doesn't yet unblock disk DMA.
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2021-10-11 03:37:56 -07:00 |
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Thomas Harte
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99492c2ec2
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Further tweak logging.
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2021-10-10 18:19:50 -07:00 |
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Thomas Harte
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846b505d27
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Reduce logging; disk data probably isn't the immediate obstacle.
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2021-10-10 13:04:10 -07:00 |
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Thomas Harte
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8d43b4a98d
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Expands Disk DMA access window.
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2021-10-10 11:47:02 -07:00 |
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Thomas Harte
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9336ffe216
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Take a stab at index-hole sync.
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2021-10-09 08:01:02 -07:00 |
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Thomas Harte
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eb157f15f3
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Adds index hole interrupt.
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2021-10-09 04:08:59 -07:00 |
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Thomas Harte
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d6e2a3f425
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Make a first attempt to spool into RAM.
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2021-10-08 18:11:47 -07:00 |
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Thomas Harte
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b47ca13ed3
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Push disk data onwards.
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2021-10-08 17:18:11 -07:00 |
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Thomas Harte
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67546c4d6e
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Per the HRM, the index hole is connected to CIA B, potentially to raise an interrupt.
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2021-10-08 17:12:37 -07:00 |
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Thomas Harte
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f72deb0a5c
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Correct RDY position.
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2021-10-08 04:32:13 -07:00 |
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Thomas Harte
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616ccbb878
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Correct ID bit placement, multiplex with motor state.
The latter per my reading of http://www.primrosebank.net/computers/amiga/upgrades/amiga_upgrades_storage_fdis.htm
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2021-10-08 04:05:57 -07:00 |
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Thomas Harte
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5899af0038
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Starts accumulating disk data.
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2021-10-07 05:11:32 -07:00 |
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Thomas Harte
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33ff4f3b5c
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Eliminate drive copies.
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2021-10-06 13:40:28 -07:00 |
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Thomas Harte
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20bad38d42
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Add drive activity lights.
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2021-10-06 04:54:40 -07:00 |
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Thomas Harte
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92a07398cd
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I think CHNG works the other way around.
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2021-10-06 04:47:52 -07:00 |
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Thomas Harte
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e961d0b4a3
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Switch RDY type.
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2021-10-06 04:41:09 -07:00 |
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Thomas Harte
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2253ff656a
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Adds route for inserting disks.
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2021-10-05 16:12:30 -07:00 |
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Thomas Harte
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18631399ad
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Attempts to clock the disk controller.
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2021-10-05 15:38:56 -07:00 |
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Thomas Harte
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ad4afcdcd5
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Switch stepping direction.
Empirically, based on the actions of Kickstart, and assuming my confusion is because the relevant signal is active low.
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2021-10-05 15:23:48 -07:00 |
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Thomas Harte
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2cf5bcc5db
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Clarify logic somewhat.
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2021-10-05 15:20:05 -07:00 |
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Thomas Harte
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1180ad7662
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Disables a couple of now-trustworthy LOGs.
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2021-10-05 06:51:47 -07:00 |
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Thomas Harte
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5463cd1ae3
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Attempts to support stepping and head selection.
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2021-10-05 06:36:17 -07:00 |
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Thomas Harte
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647ec770ce
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Implements motor latching, drive ID shift registers.
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2021-10-05 05:12:01 -07:00 |
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Thomas Harte
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e47bec2e65
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Switch CIA B ports over.
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2021-10-05 03:38:11 -07:00 |
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Thomas Harte
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674941abdf
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Starts to add a disk controller.
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2021-10-04 16:45:05 -07:00 |
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Thomas Harte
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b3f0ca39ed
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Adds some unused drives.
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2021-10-04 08:12:13 -07:00 |
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