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Commit Graph

302 Commits

Author SHA1 Message Date
Thomas Harte
e4f04d0977 Merge branch 'master' into AYFidelity 2017-08-11 14:41:08 -04:00
Thomas Harte
a5593bec79 Threw in support for the light-pen trigger. 2017-08-10 15:00:14 -04:00
Thomas Harte
a1e2646301 Imposed counter size limits. 2017-08-10 14:58:24 -04:00
Thomas Harte
6a6e5ae79c Forced users of the 6845 to be explicit about which type. So far with no effect. 2017-08-10 12:28:57 -04:00
Thomas Harte
02d792c003 Simplified logic slightly, avoiding repetition. 2017-08-10 11:48:37 -04:00
Thomas Harte
be8e7a4144 Eliminated false register aliasing, restricted register sizes and locked out reading and writing where appropriate. 2017-08-10 11:22:30 -04:00
Thomas Harte
b1dbd7833a Merge branch 'master' into 6845Address 2017-08-10 11:15:08 -04:00
Thomas Harte
a4c910f1de This appears to be a more accurate take on 6845 address advancement — it is necessary that character output has finished for the line address to be updated. 2017-08-10 11:12:53 -04:00
Thomas Harte
2eed24e859 Made an initial attempt at [a subset of] multi-sector reads. 2017-08-10 11:11:26 -04:00
Thomas Harte
b11d142cff Switched to descriptive names. 2017-08-08 20:35:41 -04:00
Thomas Harte
021ff8674e Added something for sense drive status. 2017-08-08 20:30:54 -04:00
Thomas Harte
e3d1f4fe1e Subjectively, this might be more correct. It definitely prevents intermediate frequencies. More research required. 2017-08-08 17:58:35 -04:00
Thomas Harte
3bdedfd749 Improved comments. 2017-08-08 07:44:46 -04:00
Thomas Harte
46278ff297 Experimental: is this meant to be a compare-before-increment? 2017-08-07 23:02:29 -04:00
Thomas Harte
390ecec3d9 Added: now declines to pass on output if in input mode for ports A and B. 2017-08-07 19:56:22 -04:00
Thomas Harte
41a30c147d Adjusted: invalid register selection simply deselects all registers. 2017-08-07 19:51:36 -04:00
Thomas Harte
4709ae80cb Added port direction tests. 2017-08-07 19:36:55 -04:00
Thomas Harte
7fbb455836 Per the CPC test I'm checking, 0s should be returned for non-retained bits, not 1s. 2017-08-07 19:07:12 -04:00
Thomas Harte
745afd217f The port input/output flags are now honoured; reading a port that is set as an output returns the current output value. 2017-08-07 19:01:18 -04:00
Thomas Harte
47732ffb98 Prevented the 8272 from overreading ID fields (and, by doing so, overrunning its internal buffer). Exposed the MFMController's CRC generator for inspection. 2017-08-07 12:37:22 -04:00
Thomas Harte
d07f3216ab Added a broad phase on whether seeking is ongoing. 2017-08-07 12:12:59 -04:00
Thomas Harte
68c73184b1 Had failed to spot that by taking control of stepping at this level, the appropriate invalidate_tracks were not being sent. 2017-08-07 10:36:53 -04:00
Thomas Harte
7f824d6494 Ensured seeks and recalibrates end immediately if no seeking is required. 2017-08-07 10:31:32 -04:00
Thomas Harte
3219212f03 A closer inspection of the data sheet seems to suggest that invalid command sequences will post ST0. 2017-08-07 07:35:41 -04:00
Thomas Harte
d90e35e5bd Added a bunch of comments, and ensured that the data request bit remains set for the entire period that command bytes are accepted. 2017-08-07 07:27:00 -04:00
Thomas Harte
73f8488150 Reaching the end of the usable part of my day, decided to tidy up a little before bed with indentation that reflects a distinction between top-level entry points and mere loops. 2017-08-06 22:14:18 -04:00
Thomas Harte
3853966a1e Removed formal storage of ST3, as it just seems to be composed live. This may turn out also to be the best way to deal with ST0–2, time will tell. Also took a stab at the error in responding properly to the ROM's intended use of seek might be accepting new commands as replacements for old ones rather than rejecting them. That didn't seem to do the trick. 2017-08-06 22:10:12 -04:00
Thomas Harte
d63893a437 Collapsed implementations of recalibrate and seek, and decided to intend to go for an upward count on steps taken rather than a downward one. But seek continues presently to fail. 2017-08-06 21:52:52 -04:00
Thomas Harte
90c74043f5 Remembered to toggle off RQM between bytes. CAT now works. 2017-08-06 21:21:59 -04:00
Thomas Harte
600445d90a Made a first attempt to return sector contents. 2017-08-06 20:40:29 -04:00
Thomas Harte
e4b405fd3d With the ROM now using a read ID to set its expectations, implemented that and fixed FIND/READ_HEADER macros for multiple use. Execution now reaches the unimplemented section of read data. 2017-08-06 20:32:46 -04:00
Thomas Harte
3b7ecbdf0d Renamed result_ to result_stack_ to emphasis the fact that it goes backwards. Switched meaning of CB so that it is set for the entire command, execution and result phases. 2017-08-06 20:17:12 -04:00
Thomas Harte
01efb645cb Took a reasonable gamble that the CHRN reported is from internal registers, not from the last-found header. 2017-08-06 19:57:34 -04:00
Thomas Harte
b5ec1f42d5 Started resetting 'busy' when entering the result phase. AMSDOS now complains of a missing disk after failing to find sector 01. My belief is that it should end up asking for C1. So this is not even getting through a failure to find a sector correctly yet. 2017-08-06 19:48:17 -04:00
Thomas Harte
e9972aa0dd Added respect for the index-hole limit on reading, and an error phase. 2017-08-06 19:25:44 -04:00
Thomas Harte
1c9a744b01 Made an effort to start inspecting ID fields, at least. Discovered that my emulation has somehow stopped proceeding beyond sense interrupt status though. Fix one in that area: adjust ST0 just in time for the sense interrupt status response, as that'll need to specify the drive number properly. 2017-08-06 18:06:20 -04:00
Thomas Harte
e6d4bb29d8 Discovered correct sense interrupt status result if nobody is in the completed seeking state, and switched to it. It's a single 0x80 rather than two bytes. 2017-08-06 15:34:33 -04:00
Thomas Harte
6c5b562d97 Made an attempt at some of the correct seek/recalibrate behaviour: it's now asynchronous from command processing and able to work on up to four drives at once. I just probably am not yet hitting all the status flags I need to hit. 2017-08-06 15:22:07 -04:00
Thomas Harte
a7103f9333 Disks are now communicated to the 8272. Which is able to handle four of them. 2017-08-06 13:24:14 -04:00
Thomas Harte
c12425e141 Added storage for the extended four status registers, and made an attempt at implementing the two most trivial result-phase commands. Am slightly paused momentarily trying to figure out whether seek activity is orthogonal to read/write activity. 2017-08-06 12:55:57 -04:00
Thomas Harte
89f6de1383 Started on a real ugly-implementation coroutine approach, and implemented specify as a fairly trivial first command: it has no result phase, and is the only thing called by AMSDOS as part of the initialisation sequence. 2017-08-06 12:36:18 -04:00
Thomas Harte
34eaf75352 Fixed WAIT_FOR_TIME macro. 2017-08-06 12:08:54 -04:00
Thomas Harte
29288b690e Switched disk controllers to be instantiated explicitly in terms of cycles, created an Amstrad-specific subclass of the 8272 to record the direct programmatic availability of all disk motors bundled together, and otherwise adjusted to ensure the thing is clocked and that the motor is enabled and disabled appropriately. The 8272 is also now formally a subclass of the incoming MDM controller. 2017-08-06 09:45:16 -04:00
Thomas Harte
25fd3f7e50 Mildly increased work in here, still primarily oriented towards logging what I actually need to get done. 2017-08-05 22:26:59 -04:00
Thomas Harte
3e984e75b6 Strung up an empty shell that eventually should contain the 8272, and added appropriate IO decoding to the Amstrad. 2017-08-05 19:45:52 -04:00
Thomas Harte
26ce6cdab2 Permitted register 3 to dictate vertical sync length. 2017-08-04 08:56:36 -04:00
Thomas Harte
3ca9c38777 Attempted to move to more accurate bus reading — if control lines are set then all subsequent data inputs should act according to the current control lines; changes to port input should be reflected live upon readings, etc. 2017-08-02 19:45:58 -04:00
Thomas Harte
0267bc237f Added the ability to set a port input, and relaxed bus state testing. I think my on-demand bus reactions here are inappropriate, so more work to do here probably. 2017-08-01 18:04:51 -04:00
Thomas Harte
e6854ff8db Corrected typo: the input to an AY is BDIR, not BCDIR. 2017-08-01 17:06:57 -04:00
Thomas Harte
2d4e202be3 Completed dangling comment. 2017-08-01 17:01:36 -04:00